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Results 1 - 8 of 8 for BTCQ (0.06 sec)

  1. test/codegen/bits.go

    	n += a &^ (1 << 60)
    
    	// amd64:"ANDQ\t[$]-2"
    	n += a &^ (1 << 0)
    
    	return n
    }
    
    func bitcompl64(a, b uint64) (n uint64) {
    	// amd64:"BTCQ"
    	n += b ^ (1 << (a & 63))
    
    	// amd64:"BTCQ\t[$]63"
    	n += a ^ (1 << 63)
    
    	// amd64:"BTCQ\t[$]60"
    	n += a ^ (1 << 60)
    
    	// amd64:"XORQ\t[$]1"
    	n += a ^ (1 << 0)
    
    	return n
    }
    
    /************************************
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 7.8K bytes
    - Viewed (0)
  2. test/codegen/memops.go

    	// amd64: `BTRQ\t\$63, 56\(AX\)`
    	p[7] &^= 1 << 63
    
    	// amd64: `XORQ\t\$8, 64\(AX\)`
    	p[8] ^= 8
    	// amd64: `XORQ\t\$1073741824, 72\(AX\)`
    	p[9] ^= 1 << 30
    	// amd64: `BTCQ\t\$31, 80\(AX\)`
    	p[10] ^= 1 << 31
    	// amd64: `BTCQ\t\$63, 88\(AX\)`
    	p[11] ^= 1 << 63
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  3. src/cmd/internal/obj/x86/anames.go

    	"BLSIL",
    	"BLSIQ",
    	"BLSMSKL",
    	"BLSMSKQ",
    	"BLSRL",
    	"BLSRQ",
    	"BOUNDL",
    	"BOUNDW",
    	"BSFL",
    	"BSFQ",
    	"BSFW",
    	"BSRL",
    	"BSRQ",
    	"BSRW",
    	"BSWAPL",
    	"BSWAPQ",
    	"BTCL",
    	"BTCQ",
    	"BTCW",
    	"BTL",
    	"BTQ",
    	"BTRL",
    	"BTRQ",
    	"BTRW",
    	"BTSL",
    	"BTSQ",
    	"BTSW",
    	"BTW",
    	"BYTE",
    	"BZHIL",
    	"BZHIQ",
    	"CBW",
    	"CDQ",
    	"CDQE",
    	"CLAC",
    	"CLC",
    	"CLD",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "BTCL", argLength: 2, reg: gp21, asm: "BTCL", resultInArg0: true, clobberFlags: true},                   // complement bit arg1%32 in arg0
    		{name: "BTCQ", argLength: 2, reg: gp21, asm: "BTCQ", resultInArg0: true, clobberFlags: true},                   // complement bit arg1%64 in arg0
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  5. src/cmd/asm/internal/asm/testdata/amd64enc.s

    	BTCL R11, R11                           // 450fbbdb
    	BTCQ $7, (BX)                           // 480fba3b07
    	BTCQ $7, (R11)                          // 490fba3b07
    	BTCQ $7, DX                             // 480fbafa07
    	BTCQ $7, R11                            // 490fbafb07
    	BTCQ DX, (BX)                           // 480fbb13
    	BTCQ R11, (BX)                          // 4c0fbb1b
    	BTCQ DX, (R11)                          // 490fbb13
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  6. src/runtime/mbitmap.go

    	if tp.mask == 0 {
    		return tp, 0
    	}
    	// BSFQ
    	var i int
    	if goarch.PtrSize == 8 {
    		i = sys.TrailingZeros64(uint64(tp.mask))
    	} else {
    		i = sys.TrailingZeros32(uint32(tp.mask))
    	}
    	// BTCQ
    	tp.mask ^= uintptr(1) << (i & (ptrBits - 1))
    	// LEAQ (XX)(XX*8)
    	return tp, tp.addr + uintptr(i)*goarch.PtrSize
    }
    
    // next advances the pointers iterator, returning the updated iterator and
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 00:18:55 UTC 2024
    - 60K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/rewriteAMD64.go

    		return true
    	}
    	return false
    }
    func rewriteValueAMD64_OpAMD64XORQ(v *Value) bool {
    	v_1 := v.Args[1]
    	v_0 := v.Args[0]
    	// match: (XORQ (SHLQ (MOVQconst [1]) y) x)
    	// result: (BTCQ x y)
    	for {
    		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    			if v_0.Op != OpAMD64SHLQ {
    				continue
    			}
    			y := v_0.Args[1]
    			v_0_0 := v_0.Args[0]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 712.7K bytes
    - Viewed (0)
  8. src/cmd/compile/internal/ssa/opGen.go

    				{1, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    			outputs: []outputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    			},
    		},
    	},
    	{
    		name:         "BTCQ",
    		argLen:       2,
    		resultInArg0: true,
    		clobberFlags: true,
    		asm:          x86.ABTCQ,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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