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Results 1 - 4 of 4 for BSRW (0.04 sec)

  2. github.com/golang/go

    src/cmd/internal/obj/x86/anames.go 

    	"BLENDPS",
	"BLENDVPD",
	"BLENDVPS",
	"BLSIL",
	"BLSIQ",
	"BLSMSKL",
	"BLSMSKQ",
	"BLSRL",
	"BLSRQ",
	"BOUNDL",
	"BOUNDW",
	"BSFL",
	"BSFQ",
	"BSFW",
	"BSRL",
	"BSRQ",
	"BSRW",
	"BSWAPL",
	"BSWAPQ",
	"BTCL",
	"BTCQ",
	"BTCW",
	"BTL",
	"BTQ",
	"BTRL",
	"BTRQ",
	"BTRW",
	"BTSL",
	"BTSQ",
	"BTSW",
	"BTW",
	"BYTE",
	"BZHIL",
	"BZHIQ",
	"CBW",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 19.1K bytes
    - Viewed (0)
  3. github.com/golang/go

    src/cmd/compile/internal/ssa/_gen/386Ops.go 

    		{name: "BSRL", argLength: 1, reg: gp11, asm: "BSRL", clobberFlags: true}, // arg0 # of high-order zeroes ; undef if zero
		{name: "BSRW", argLength: 1, reg: gp11, asm: "BSRW", clobberFlags: true}, // arg0 # of high-order zeroes ; undef if zero

		{name: "BSWAPL", argLength: 1, reg: gp11, asm: "BSWAPL", resultInArg0: true}, // arg0 swap bytes
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 14 08:10:32 UTC 2023
    - 45.1K bytes
    - Viewed (0)
  4. github.com/golang/go

    src/cmd/asm/internal/asm/testdata/amd64enc.s 

    	BSFQ R11, R11                           // 4d0fbcdb
	BSRW (BX), DX                           // 660fbd13
	BSRW (R11), DX                          // 66410fbd13
	BSRW DX, DX                             // 660fbdd2
	BSRW R11, DX                            // 66410fbdd3
	BSRW (BX), R11                          // 66440fbd1b
	BSRW (R11), R11                         // 66450fbd1b
	BSRW DX, R11                            // 66440fbdda
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Oct 08 21:38:44 UTC 2021
    - 581.9K bytes
    - Viewed (0)
  5. github.com/golang/go

    src/cmd/compile/internal/ssa/opGen.go 

    		reg: regInfo{
			inputs: []inputInfo{
				{0, 239}, // AX CX DX BX BP SI DI
			},
			outputs: []outputInfo{
				{0, 239}, // AX CX DX BX BP SI DI
			},
		},
	},
	{
		name:         "BSRW",
		argLen:       1,
		clobberFlags: true,
		asm:          x86.ABSRW,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 239}, // AX CX DX BX BP SI DI
			},
			outputs: []outputInfo{
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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