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Results 1 - 8 of 8 for BSRQ (0.06 sec)
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test/codegen/mathbits.go
// ----------------------- // func LeadingZeros(n uint) int { // amd64/v1,amd64/v2:"BSRQ" // amd64/v3:"LZCNTQ", -"BSRQ" // s390x:"FLOGR" // arm:"CLZ" arm64:"CLZ" // mips:"CLZ" // wasm:"I64Clz" // ppc64x:"CNTLZD" return bits.LeadingZeros(n) } func LeadingZeros64(n uint64) int { // amd64/v1,amd64/v2:"BSRQ" // amd64/v3:"LZCNTQ", -"BSRQ" // s390x:"FLOGR" // arm:"CLZ" arm64:"CLZ" // mips:"CLZ" // wasm:"I64Clz"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 18:51:17 UTC 2024 - 19.6K bytes - Viewed (0) -
src/internal/bytealg/compare_amd64.s
MOVQ -8(SI)(R8*1), AX MOVQ -8(DI)(R8*1), CX CMPQ AX, CX JEQ allsame // AX and CX contain parts of a and b that differ. diff8: BSWAPQ AX // reverse order of bytes BSWAPQ CX XORQ AX, CX BSRQ CX, CX // index of highest bit difference SHRQ CX, AX // move a's bit to bottom ANDQ $1, AX // mask bit LEAQ -1(AX*2), AX // 1/0 => +1/-1 RET // 0-7 bytes in common small:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Aug 18 17:17:01 UTC 2022 - 4.3K bytes - Viewed (0) -
src/cmd/internal/obj/x86/anames.go
"BLENDPD", "BLENDPS", "BLENDVPD", "BLENDVPS", "BLSIL", "BLSIQ", "BLSMSKL", "BLSMSKQ", "BLSRL", "BLSRQ", "BOUNDL", "BOUNDW", "BSFL", "BSFQ", "BSFW", "BSRL", "BSRQ", "BSRW", "BSWAPL", "BSWAPQ", "BTCL", "BTCQ", "BTCW", "BTL", "BTQ", "BTRL", "BTRQ", "BTRW", "BTSL", "BTSQ", "BTSW", "BTW", "BYTE", "BZHIL", "BZHIQ",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64.rules
// For GOAMD64>=3, BitLen can be calculated by OperandSize - LZCNT(x). (BitLen64 <t> x) && buildcfg.GOAMD64 < 3 => (ADDQconst [1] (CMOVQEQ <t> (Select0 <t> (BSRQ x)) (MOVQconst <t> [-1]) (Select1 <types.TypeFlags> (BSRQ x)))) (BitLen32 x) && buildcfg.GOAMD64 < 3 => (Select0 (BSRQ (LEAQ1 <typ.UInt64> [1] (MOVLQZX <typ.UInt64> x) (MOVLQZX <typ.UInt64> x))))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 93.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
BSRL R11, R11 // 450fbddb BSRQ (BX), DX // 480fbd13 BSRQ (R11), DX // 490fbd13 BSRQ DX, DX // 480fbdd2 BSRQ R11, DX // 490fbdd3 BSRQ (BX), R11 // 4c0fbd1b BSRQ (R11), R11 // 4d0fbd1b BSRQ DX, R11 // 4c0fbdda
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "BSFL", argLength: 1, reg: gp11, asm: "BSFL", typ: "UInt32", clobberFlags: true}, // # of low-order zeroes in 32-bit arg {name: "BSRQ", argLength: 1, reg: gp11flags, asm: "BSRQ", typ: "(UInt64,Flags)"}, // # of high-order zeroes in 64-bit arg {name: "BSRL", argLength: 1, reg: gp11, asm: "BSRL", typ: "UInt32", clobberFlags: true}, // # of high-order zeroes in 32-bit arg
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1) -
src/cmd/compile/internal/ssa/rewriteAMD64.go
v_0 := v.Args[0] b := v.Block typ := &b.Func.Config.Types // match: (BitLen64 <t> x) // cond: buildcfg.GOAMD64 < 3 // result: (ADDQconst [1] (CMOVQEQ <t> (Select0 <t> (BSRQ x)) (MOVQconst <t> [-1]) (Select1 <types.TypeFlags> (BSRQ x)))) for { t := v.Type x := v_0 if !(buildcfg.GOAMD64 < 3) { break } v.reset(OpAMD64ADDQconst) v.AuxInt = int32ToAuxInt(1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 12 19:38:41 UTC 2024 - 712.7K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/opGen.go
}, outputs: []outputInfo{ {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15 }, }, }, { name: "BSRQ", argLen: 1, asm: x86.ABSRQ, reg: regInfo{ inputs: []inputInfo{ {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15 }, outputs: []outputInfo{ {1, 0},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 1M bytes - Viewed (0)