- Sort Score
- Result 10 results
- Languages All
Results 1 - 10 of 488 for neon (0.06 sec)
-
docs/en/data/external_links.yml
Articles: English: - author: Stephen Siegert - Neon link: https://neon.tech/blog/deploy-a-serverless-fastapi-app-with-neon-postgres-and-aws-app-runner-at-any-scale title: Deploy a Serverless FastAPI App with Neon Postgres and AWS App Runner at any scale - author: Kurtis Pykes - NVIDIA link: https://developer.nvidia.com/blog/building-a-machine-learning-microservice-with-fastapi/ title: Building a Machine Learning Microservice with FastAPI - author: Ravgeet Dhillon - Twilio link: https://www.tw...
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Wed Jun 12 00:47:57 UTC 2024 - 22K bytes - Viewed (0) -
src/vendor/golang.org/x/sys/cpu/cpu.go
HasIWMMXT bool // Intel Wireless MMX technology support HasCRUNCH bool // MaverickCrunch context switching and handling HasTHUMBEE bool // Thumb EE instruction set HasNEON bool // NEON instruction set HasVFPv3 bool // Vector floating point version 3 support HasVFPv3D16 bool // Vector floating point version 3 D8-D15 HasTLS bool // Thread local storage support
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 08 16:12:58 UTC 2024 - 12.1K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_arm64.s
TEXT ·p256MovCond(SB),NOSPLIT,$0 MOVD res+0(FP), res_ptr MOVD a+8(FP), a_ptr MOVD b+16(FP), b_ptr MOVD cond+24(FP), R3 CMP $0, R3 // Two remarks: // 1) Will want to revisit NEON, when support is better // 2) CSEL might not be constant time on all ARM processors LDP 0*16(a_ptr), (R4, R5) LDP 1*16(a_ptr), (R6, R7) LDP 2*16(a_ptr), (R8, R9) LDP 0*16(b_ptr), (R16, R17)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 29.7K bytes - Viewed (0) -
src/runtime/iface.go
newN := n * 2 // make it at most 50% full newN = 1 << sys.Len64(uint64(newN-1)) // round up to a power of 2 // Allocate the new table. newSize := unsafe.Sizeof(abi.TypeAssertCache{}) + uintptr(newN-1)*unsafe.Sizeof(abi.TypeAssertCacheEntry{}) newC := (*abi.TypeAssertCache)(mallocgc(newSize, nil, true)) newC.Mask = uintptr(newN - 1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 29 17:58:53 UTC 2024 - 22.5K bytes - Viewed (0) -
guava/src/com/google/common/collect/RegularImmutableMap.java
* @param newN the expected number of entries once duplicates are removed * @param duplicates a map of canonical {@link Entry} objects for each duplicate key. This map * will be updated by the method, setting each value to false as soon as the {@link Entry} has * been included in the new entry array. * @return an array of {@code newN} entries where no key appears more than once. */
Registered: Wed Jun 12 16:38:11 UTC 2024 - Last Modified: Tue May 28 18:11:09 UTC 2024 - 16.2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/mod/sumdb/tlog/tile.go
for level := uint(0); newTreeSize>>(H*level) > 0; level++ { oldN := oldTreeSize >> (H * level) newN := newTreeSize >> (H * level) if oldN == newN { continue } for n := oldN >> H; n < newN>>H; n++ { tiles = append(tiles, Tile{H: h, L: int(level), N: n, W: 1 << H}) } n := newN >> H if w := int(newN - n<<H); w > 0 { tiles = append(tiles, Tile{H: h, L: int(level), N: n, W: w}) } }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 03 02:38:00 UTC 2024 - 13K bytes - Viewed (0) -
docs/iam/policies/deny-non-sse-kms-objects.json
Shubhendu <******@****.***> 1715701387 +0530
Registered: Sun Jun 16 00:44:34 UTC 2024 - Last Modified: Tue May 14 15:43:07 UTC 2024 - 413 bytes - Viewed (0) -
docs/vi/docs/features.md
* Validate **các cấu trúc phức tạp**: * Sử dụng các models Pydantic phân tầng, `List` và `Dict` của Python `typing`,... * Và các validators cho phép các cấu trúc dữ liệu phức tạp trở nên rõ ràng và dễ dàng để định nghĩa, kiểm tra và tài liệu hóa thành JSON Schema.
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Thu Apr 18 19:53:19 UTC 2024 - 11.6K bytes - Viewed (0) -
docs/vi/docs/index.md
Registered: Mon Jun 17 08:32:26 UTC 2024 - Last Modified: Mon Apr 29 05:18:04 UTC 2024 - 21.9K bytes - Viewed (0) -
test/codegen/rotate.go
// riscv64: "OR","SLLI","SRLI",-"AND" a += x<<6 + x>>2 // amd64:"ROLB\t[$]7" // riscv64: "OR","SLLI","SRLI",-"AND" a += x<<7 ^ x>>1 return a } // ----------------------- // // non-const rotates // // ----------------------- // func rot64nc(x uint64, z uint) uint64 { var a uint64 z &= 63 // amd64:"ROLQ",-"AND" // arm64:"ROR","NEG",-"AND"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 07 14:57:07 UTC 2024 - 6K bytes - Viewed (0)