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Results 1 - 10 of 13 for lxvrhx (0.11 sec)
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src/cmd/internal/obj/ppc64/anames.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
VSHASIGMAD $2, $15, V1, V2 // 104196c2 LXVD2X (R3)(R4), VS1 // 7c241e98 LXVD2X (R3)(R0), VS1 // 7c201e98 LXVD2X (R3), VS1 // 7c201e98 LXVDSX (R3)(R4), VS1 // 7c241a98 LXVDSX (R3)(R0), VS1 // 7c201a98 LXVDSX (R3), VS1 // 7c201a98 LXVH8X (R3)(R4), VS1 // 7c241e58 LXVH8X (R3)(R0), VS1 // 7c201e58
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/crypto/internal/nistec/p256_asm_ppc64le.s
// cond is R1 + 24 (cond offset) + 32 LXVDSX (R1)(R21), SEL VSPLTISB $0, ZER // SEL controls whether to store a or b VCMPEQUD SEL, ZER, SEL LXVD2X (P1ptr+R0), X1H LXVD2X (P1ptr+R16), X1L LXVD2X (P1ptr+R17), Y1H LXVD2X (P1ptr+R18), Y1L LXVD2X (P1ptr+R19), Z1H LXVD2X (P1ptr+R20), Z1L LXVD2X (P2ptr+R0), X2H LXVD2X (P2ptr+R16), X2L LXVD2X (P2ptr+R17), Y2H LXVD2X (P2ptr+R18), Y2L
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 56.5K bytes - Viewed (0) -
src/crypto/sha256/sha256block_ppc64x.s
MOVD $·kcon(SB), TBL_STRT MOVD $0x10, R_x010 #ifdef GOARCH_ppc64le MOVWZ $8, TEMP LVSL (TEMP)(R0), LEMASK VSPLTISB $0x0F, KI VXOR KI, LEMASK, LEMASK #endif LXVW4X (CTX)(R_x000), V0 LXVW4X (CTX)(R_x010), V4 // unpack the input values into vector registers VSLDOI $4, V0, V0, V1 VSLDOI $8, V0, V0, V2 VSLDOI $12, V0, V0, V3 VSLDOI $4, V4, V4, V5 VSLDOI $8, V4, V4, V6
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 14.4K bytes - Viewed (0) -
src/vendor/golang.org/x/crypto/chacha20/chacha_ppc64le.s
MOVD $16, R20 // V16 LXVW4X (CONSTBASE)(R0), VS48 ADD $80,CONSTBASE // Load key into V17,V18 LXVW4X (KEY)(R0), VS49 LXVW4X (KEY)(R8), VS50 // Load CNT, NONCE into V19 LXVW4X (CNT)(R0), VS51 // Clear V27 VXOR V27, V27, V27 // V28 LXVW4X (CONSTBASE)(R11), VS60 // Load mask constants for VPERMXOR LXVW4X (MASK)(R0), V20 LXVW4X (MASK)(R20), V21
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 05 22:18:42 UTC 2024 - 9K bytes - Viewed (0) -
src/crypto/subtle/xor_ppc64x.s
// Load 4 vectors of a and b // XOR the corresponding vectors // from a and b and store the result loop64: LXVD2X (R4)(R8), VS32 LXVD2X (R4)(R10), VS34 LXVD2X (R4)(R14), VS36 LXVD2X (R4)(R15), VS38 LXVD2X (R5)(R8), VS33 LXVD2X (R5)(R10), VS35 LXVD2X (R5)(R14), VS37 LXVD2X (R5)(R15), VS39 XXLXOR VS32, VS33, VS32 XXLXOR VS34, VS35, VS34 XXLXOR VS36, VS37, VS36 XXLXOR VS38, VS39, VS38
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 2.9K bytes - Viewed (0) -
src/crypto/aes/asm_ppc64x.s
MOVD $128, R20 \ MOVD $144, R21 \ LXVD2X (R0+Rkeyp), V6 \ ADD $16, Rkeyp \ BEQ CR1, L_start10 \ BEQ CR2, L_start12 \ LXVD2X (R0+Rkeyp), V7 \ LXVD2X (R12+Rkeyp), V8 \ ADD $32, Rkeyp \ L_start12: \ LXVD2X (R0+Rkeyp), V9 \ LXVD2X (R12+Rkeyp), V10 \ ADD $32, Rkeyp \ L_start10: \ LXVD2X (R0+Rkeyp), V11 \ LXVD2X (R12+Rkeyp), V12 \ LXVD2X (R14+Rkeyp), V13 \ LXVD2X (R15+Rkeyp), V14 \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 20 18:05:32 UTC 2024 - 18.6K bytes - Viewed (0) -
src/crypto/aes/gcm_ppc64x.s
MOVD $48, R18; \ MOVD $64, R19; \ LXVD2X (blk_key)(R0), VS0; \ LXVD2X (blk_key)(R16), VS1; \ LXVD2X (blk_key)(R17), VS2; \ LXVD2X (blk_key)(R18), VS3; \ LXVD2X (blk_key)(R19), VS4; \ ADD $64, R16; \ ADD $64, R17; \ ADD $64, R18; \ ADD $64, R19; \ LXVD2X (blk_key)(R16), VS5; \ LXVD2X (blk_key)(R17), VS6; \ LXVD2X (blk_key)(R18), VS7; \ LXVD2X (blk_key)(R19), VS8; \ ADD $64, R16; \
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
MOVWZ $8, TEMP LVSL (TEMP)(R0), LEMASK VSPLTISB $0x0F, KI VXOR KI, LEMASK, LEMASK #endif LXVD2X (CTX)(R_x000), VS32 // v0 = vs32 LXVD2X (CTX)(R_x010), VS34 // v2 = vs34 LXVD2X (CTX)(R_x020), VS36 // v4 = vs36 // unpack the input values into vector registers VSLDOI $8, V0, V0, V1 LXVD2X (CTX)(R_x030), VS38 // v6 = vs38 VSLDOI $8, V2, V2, V3 VSLDOI $8, V4, V4, V5 VSLDOI $8, V6, V6, V7
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0)