Search Options

Results per page
Sort
Preferred Languages
Advance

Results 1 - 6 of 6 for Loong64 (0.27 sec)

  1. src/cmd/asm/internal/arch/loong64.go

    }
    
    // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is
    // one of the MUL/DIV/REM instructions that require special handling.
    func IsLoong64MUL(op obj.As) bool {
    	switch op {
    	case loong64.AMUL, loong64.AMULU, loong64.AMULV, loong64.AMULVU,
    		loong64.ADIV, loong64.ADIVU, loong64.ADIVV, loong64.ADIVVU,
    		loong64.AREM, loong64.AREMU, loong64.AREMV, loong64.AREMVU:
    		return true
    	}
    	return false
    }
    
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 29 02:47:00 UTC 2024
    - 1.8K bytes
    - Viewed (0)
  2. buildscripts/checkdeps.sh

    		fi
    	done
    
    	return 0
    }
    
    assert_is_supported_arch() {
    	case "${ARCH}" in
    	x86_64 | amd64 | aarch64 | ppc64le | arm* | s390x | loong64 | loongarch64)
    		return
    		;;
    	*)
    		echo "Arch '${ARCH}' is not supported. Supported Arch: [x86_64, amd64, aarch64, ppc64le, arm*, s390x, loong64, loongarch64]"
    		exit 1
    		;;
    	esac
    }
    
    assert_is_supported_os() {
    	case "${KNAME}" in
    Registered: Sun Nov 03 19:28:11 UTC 2024
    - Last Modified: Thu Jun 13 05:08:11 UTC 2024
    - 3.4K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/arch/arch.go

    	for i := loong64.REG_R0; i <= loong64.REG_R31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := loong64.REG_F0; i <= loong64.REG_F31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := loong64.REG_FCSR0; i <= loong64.REG_FCSR31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    	for i := loong64.REG_FCC0; i <= loong64.REG_FCC31; i++ {
    		register[obj.Rconv(i)] = int16(i)
    	}
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/asm.go

    			if arch.IsMIPSCMP(op) || arch.IsMIPSMUL(op) {
    				prog.From = a[0]
    				prog.Reg = p.getRegister(prog, op, &a[1])
    				break
    			}
    		} else if p.arch.Family == sys.Loong64 {
    			if arch.IsLoong64RDTIME(op) {
    				// The Loong64 RDTIME family of instructions is a bit special,
    				// in that both its register operands are outputs
    				prog.To = a[0]
    				if a[1].Type != obj.TYPE_REG {
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	MOVV	R4, FCSR3		// 83c01401
    	MOVV	FCSR3, R4		// 64c81401
    	MOVV	F4, FCC0		// 80d01401
    	MOVV	FCC0, F4		// 04d41401
    	MOVV    FCC0, R4		// 04dc1401
    	MOVV    R4, FCC0		// 80d81401
    
    	// Loong64 atomic memory access instructions
    	AMSWAPB		R14, (R13), R12 // ac395c38
    	AMSWAPH		R14, (R13), R12 // acb95c38
    	AMSWAPW		R14, (R13), R12 // ac396038
    	AMSWAPV		R14, (R13), R12 // acb96038
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Sat Nov 02 01:36:19 UTC 2024
    - 11.6K bytes
    - Viewed (0)
  6. src/cmd/cgo/gcc.go

    		if gomips == "hardfloat" {
    			return []string{"-mabi=32", "-mfp32", "-mhard-float", "-mno-odd-spreg"}
    		} else if gomips == "softfloat" {
    			return []string{"-mabi=32", "-msoft-float"}
    		}
    	case "loong64":
    		return []string{"-mabi=lp64d"}
    	}
    	return nil
    }
    
    func gccTmp() string {
    	return *objDir + "_cgo_.o"
    }
    
    // gccCmd returns the gcc command line to use for compiling
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:07:34 UTC 2024
    - 97.1K bytes
    - Viewed (0)
Back to top