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Results 1 - 2 of 2 for LDORALB (0.08 sec)

  1. src/internal/runtime/atomic/atomic_arm64.s

    #endif
    
    TEXT ·Or8(SB), NOSPLIT, $0-9
    	MOVD	ptr+0(FP), R0
    	MOVB	val+8(FP), R1
    #ifndef GOARM64_LSE
    	MOVBU	internal∕cpu·ARM64+const_offsetARM64HasATOMICS(SB), R4
    	CBZ 	R4, load_store_loop
    #endif
    	LDORALB	R1, (R0), R2
    	RET
    #ifndef GOARM64_LSE
    load_store_loop:
    	LDAXRB	(R0), R2
    	ORR	R1, R2
    	STLXRB	R2, (R0), R3
    	CBNZ	R3, load_store_loop
    	RET
    #endif
    
    // func And(addr *uint32, v uint32)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 25 19:53:03 UTC 2024
    - 9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    		// atomic and/or variant.
    		// *arg0 &= (|=) arg1. arg2=mem. returns <old content of *arg0, memory>. auxint must be zero.
    		//   AND:
    		// MNV       Rarg1, Rtemp
    		// LDANDALB  Rtemp, (Rarg0), Rout
    		//   OR:
    		// LDORALB  Rarg1, (Rarg0), Rout
    		{name: "LoweredAtomicAnd8Variant", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
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