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Results 1 - 7 of 7 for Imm (0.02 sec)
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src/cmd/internal/obj/riscv/obj.go
// Bit order - [11|4|9:8|10|6|7|3:1|5] bits := extractBitAndShift(imm, 11, 10) bits |= extractBitAndShift(imm, 4, 9) bits |= extractBitAndShift(imm, 9, 8) bits |= extractBitAndShift(imm, 8, 7) bits |= extractBitAndShift(imm, 10, 6) bits |= extractBitAndShift(imm, 6, 5) bits |= extractBitAndShift(imm, 7, 4) bits |= extractBitAndShift(imm, 3, 3) bits |= extractBitAndShift(imm, 2, 2)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Sun Apr 07 03:32:27 UTC 2024 - 77K bytes - Viewed (0) -
src/crypto/internal/edwards25519/field/_asm/fe_amd64_asm.go
Comment("Second reduction chain (carryPropagate)") // c0 = r0 >> 51 MOVQ(r0lo, c0) SHRQ(Imm(51), c0) // c1 = r1 >> 51 MOVQ(r1lo, c1) SHRQ(Imm(51), c1) // c2 = r2 >> 51 MOVQ(r2lo, c2) SHRQ(Imm(51), c2) // c3 = r3 >> 51 MOVQ(r3lo, c3) SHRQ(Imm(51), c3) // c4 = r4 >> 51 MOVQ(r4lo, c4) SHRQ(Imm(51), c4) maskAndAdd(r0lo, maskLow51Bits, c4, 19) maskAndAdd(r1lo, maskLow51Bits, c0, 1)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 7.2K bytes - Viewed (0) -
src/cmd/link/internal/riscv64/asm.go
var err error var imm, immMask int64 switch r.Type() { case objabi.R_RISCV_RVC_BRANCH: immMask = riscv.CBTypeImmMask imm, err = riscv.EncodeCBImmediate(off) if err != nil { ldr.Errorf(s, "cannot encode CB-type instruction relocation offset for %s: %v", ldr.SymName(rs), err) } case objabi.R_RISCV_RVC_JUMP: immMask = riscv.CJTypeImmMask imm, err = riscv.EncodeCJImmediate(off)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 01 08:06:08 UTC 2024 - 22.8K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
} else if p.From3Type() == obj.TYPE_CONST { /* imm imm reg reg */ /* operand order: SIX, VRA, ST, VRT */ six := int(c.regoff(&p.From)) st := int(c.regoff(p.GetFrom3())) o1 = AOP_IIRR(c.opiirr(p.As), uint32(p.To.Reg), uint32(p.Reg), uint32(st), uint32(six)) } else if p.From3Type() == obj.TYPE_NONE && p.Reg != 0 { /* imm reg reg */ /* operand order: UIM, VRB, VRT */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/asm7.go
esize = 32 case ARNG_2D: imax = 127 esize = 64 } imm := 0 switch p.As { case AVUSHR, AVSRI, AVUSRA: imm = esize*2 - shift if imm < esize || imm > imax { c.ctxt.Diag("shift out of range: %v", p) } case AVSHL, AVSLI: imm = esize + shift if imm > imax { c.ctxt.Diag("shift out of range: %v", p) } default:
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 201.1K bytes - Viewed (0) -
src/cmd/internal/obj/x86/asm6.go
ab.Put1(byte(p.From.Offset)) case Zevex_i_rm_k_r: imm, from, kmask, to := unpackOps4(p) ab.evex = newEVEXBits(z, &o.op) ab.asmevex(ctxt, p, from, nil, to, kmask) ab.asmand(ctxt, cursym, p, from, to) ab.Put1(byte(imm.Offset)) case Zevex_i_rm_v_r: imm, from, from3, to := unpackOps4(p) ab.evex = newEVEXBits(z, &o.op)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 15:44:14 UTC 2024 - 146.9K bytes - Viewed (0) -
src/cmd/link/internal/arm64/asm.go
plt.SetUint32(ctxt.Arch, plt.Size()-4, 0x90000010) // <imm> is the offset value of &got[2] to &got[0], the same below // ldr x17, [x16, <imm>] plt.AddSymRef(ctxt.Arch, gotplt.Sym(), 16, objabi.R_ARM64_GOT, 4) plt.SetUint32(ctxt.Arch, plt.Size()-4, 0xf9400211) // add x16, x16, <imm> plt.AddSymRef(ctxt.Arch, gotplt.Sym(), 16, objabi.R_ARM64_PCREL, 4)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 30 20:09:45 UTC 2024 - 47K bytes - Viewed (0)