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Results 1 - 10 of 454 for sdiv (0.12 sec)
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test/codegen/arithmetic.go
// amd64:"ANDL\t[$]1023" // arm64:"AND\t[$]1023",-"SDIV" // arm/6:"AND",-".*udiv" // arm/7:"BFC",-".*udiv",-"AND" // ppc64x:"RLDICL" return len(a) % 1024 } func LenMod2(s string) int { // 386:"ANDL\t[$]2047" // amd64:"ANDL\t[$]2047" // arm64:"AND\t[$]2047",-"SDIV" // arm/6:"AND",-".*udiv" // arm/7:"BFC",-".*udiv",-"AND" // ppc64x:"RLDICL" return len(s) % (4097 >> 1) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0) -
src/cmd/internal/obj/arm64/anames.go
"ROR", "RORW", "SBC", "SBCS", "SBCSW", "SBCW", "SBFIZ", "SBFIZW", "SBFM", "SBFMW", "SBFX", "SBFXW", "SCVTFD", "SCVTFS", "SCVTFWD", "SCVTFWS", "SDIV", "SDIVW", "SEV", "SEVL", "SHA1C", "SHA1H", "SHA1M", "SHA1P", "SHA1SU0", "SHA1SU1", "SHA256H", "SHA256H2", "SHA256SU0", "SHA256SU1", "SHA512H", "SHA512H2",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 18 01:40:37 UTC 2023 - 5.4K bytes - Viewed (0) -
tensorflow/compiler/mlir/tfr/passes/canonicalize.cc
!matchPattern(for_op.getUpperBound(), m_ConstantInt(&upper_bound)) || !matchPattern(for_op.getStep(), m_ConstantInt(&step))) { return failure(); } uint64_t trip_count = (upper_bound - lower_bound).sdiv(step).getZExtValue(); if (trip_count <= 0) return failure(); // TODO(fengliuai): use loopUnrollByFactor once the iter_arg is supported Block *single_block = for_op.getBody(); IRMapping mapping;
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Sat Jan 14 22:15:06 UTC 2023 - 6.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
SBFIZ $6, R11, $15, R20 // 74397a93 SBFXW $8, R15, $10, R20 // f4450813 SBFX $2, R27, $54, R7 // 67df4293 SDIVW R22, R14, R9 // c90dd61a SDIV R13, R21, R9 // a90ecd9a SEV // 9f2003d5 SEVL // bf2003d5
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/ARM64Ops.go
{name: "DIV", argLength: 2, reg: gp21, asm: "SDIV"}, // arg0 / arg1, signed {name: "UDIV", argLength: 2, reg: gp21, asm: "UDIV"}, // arg0 / arg1, unsigned
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu May 23 15:49:20 UTC 2024 - 58.8K bytes - Viewed (0) -
src/runtime/stubs_arm.go
// Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. package runtime import "unsafe" // Called from compiler-generated code; declared for go vet. func udiv() func _div() func _divu() func _mod() func _modu() // Called from assembly only; declared for go vet. func usplitR0() func load_g() func save_g() func emptyfunc() func _initcgo() func read_tls_fallback()
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 22 10:04:13 UTC 2023 - 689 bytes - Viewed (0) -
tensorflow/compiler/mlir/lite/ir/tfl_ops.cc
if (getFusedActivationFunction() != "NONE") return {}; return ConstFoldBinaryOp( getType(), operands, [](APFloat a, APFloat b) { return a / b; }, [](APInt a, APInt b) { return a.sdiv(b); }); } int64_t DivOp::GetArithmeticCount(Operation* op) { int64_t count; if (ArithmeticCountUtilHelper::GetFirstOutputCount(op, &count)) return count; return -1; }
Registered: Sun Jun 16 05:45:23 UTC 2024 - Last Modified: Thu May 02 09:41:17 UTC 2024 - 169.2K bytes - Viewed (0) -
src/cmd/asm/internal/arch/loong64.go
} return false } // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is // one of the MUL/DIV/REM instructions that require special handling. func IsLoong64MUL(op obj.As) bool { switch op { case loong64.AMUL, loong64.AMULU, loong64.AMULV, loong64.AMULVU, loong64.ADIV, loong64.ADIVU, loong64.ADIVV, loong64.ADIVVU, loong64.AREM, loong64.AREMU, loong64.AREMV, loong64.AREMVU: return true }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 02:04:54 UTC 2024 - 2.1K bytes - Viewed (0) -
src/cmd/compile/internal/ir/symtab.go
Racewriterange *obj.LSym TypeAssert *obj.LSym WBZero *obj.LSym WBMove *obj.LSym // Wasm SigPanic *obj.LSym Staticuint64s *obj.LSym Typedmemmove *obj.LSym Udiv *obj.LSym WriteBarrier *obj.LSym Zerobase *obj.LSym ARM64HasATOMICS *obj.LSym ARMHasVFPv4 *obj.LSym X86HasFMA *obj.LSym X86HasPOPCNT *obj.LSym X86HasSSE41 *obj.LSym
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 06 17:02:26 UTC 2023 - 2K bytes - Viewed (0) -
src/cmd/compile/internal/walk/expr.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:34:01 UTC 2024 - 27.6K bytes - Viewed (0)