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Results 1 - 10 of 11 for idivt (0.05 sec)
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src/cmd/internal/obj/x86/anames.go
"FXRSTOR", "FXRSTOR64", "FXSAVE", "FXSAVE64", "FXTRACT", "FYL2X", "FYL2XP1", "HADDPD", "HADDPS", "HLT", "HSUBPD", "HSUBPS", "ICEBP", "IDIVB", "IDIVL", "IDIVQ", "IDIVW", "IMUL3L", "IMUL3Q", "IMUL3W", "IMULB", "IMULL", "IMULQ", "IMULW", "INB", "INCB", "INCL", "INCQ", "INCW", "INL", "INSB", "INSERTPS",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 19.1K bytes - Viewed (0) -
test/codegen/arithmetic.go
// 386:"SHRL\t[$]5",-"DIVL" // amd64:"SHRQ\t[$]5",-"DIVQ" // arm:"SRL\t[$]5",-".*udiv" // arm64:"LSR\t[$]5",-"UDIV" // ppc64x:"SRD" a := n1 / 32 // unsigned // amd64:"SARQ\t[$]6",-"IDIVQ" // 386:"SARL\t[$]6",-"IDIVL" // arm:"SRA\t[$]6",-".*udiv" // arm64:"ASR\t[$]6",-"SDIV" // ppc64x:"SRAD" b := n2 / 64 // signed return a, b } // Check that constant divisions get turned into MULs
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 15:28:00 UTC 2024 - 15.2K bytes - Viewed (0) -
src/internal/cpu/cpu_arm.go
const ( hwcap_VFPv4 = 1 << 16 hwcap_IDIVA = 1 << 17 hwcap_LPAE = 1 << 20 ) func doinit() { options = []option{ {Name: "vfpv4", Feature: &ARM.HasVFPv4}, {Name: "idiva", Feature: &ARM.HasIDIVA}, {Name: "v7atomics", Feature: &ARM.HasV7Atomics}, } // HWCAP feature bits ARM.HasVFPv4 = isSet(HWCap, hwcap_VFPv4) ARM.HasIDIVA = isSet(HWCap, hwcap_IDIVA)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 31 20:38:55 UTC 2023 - 1.3K bytes - Viewed (0) -
src/io/ioutil/ioutil_test.go
f, err := TempFile("", "ioutil-test") if err != nil { t.Fatal(err) } filename := f.Name() data := "Programming today is a race between software engineers striving to " + "build bigger and better idiot-proof programs, and the Universe trying " + "to produce bigger and better idiots. So far, the Universe is winning." if err := WriteFile(filename, []byte(data), 0644); err != nil { t.Fatalf("WriteFile %s: %v", filename, err)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Apr 11 20:56:32 UTC 2023 - 3.2K bytes - Viewed (0) -
src/os/read_test.go
if err != nil { t.Fatal(err) } defer f.Close() defer Remove(f.Name()) msg := "Programming today is a race between software engineers striving to " + "build bigger and better idiot-proof programs, and the Universe trying " + "to produce bigger and better idiots. So far, the Universe is winning." if err := WriteFile(f.Name(), []byte(msg), 0644); err != nil { t.Fatalf("WriteFile %s: %v", f.Name(), err)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 10 02:36:46 UTC 2024 - 3.2K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/386Ops.go
// For DIVL, DIVW, MODL and MODW, AuxInt non-zero means that the divisor has been proved to be not -1. {name: "DIVL", argLength: 2, reg: gp11div, asm: "IDIVL", aux: "Bool", clobberFlags: true}, // arg0 / arg1 {name: "DIVW", argLength: 2, reg: gp11div, asm: "IDIVW", aux: "Bool", clobberFlags: true}, // arg0 / arg1 {name: "DIVLU", argLength: 2, reg: gp11div, asm: "DIVL", clobberFlags: true}, // arg0 / arg1
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 14 08:10:32 UTC 2023 - 45.1K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/x86/x86asm/plan9x.go
CVTSI2SD: true, CVTSI2SS: true, CVTSD2SI: true, CVTSS2SI: true, CVTTSD2SI: true, CVTTSS2SI: true, DEC: true, DIV: true, FLDENV: true, FRSTOR: true, IDIV: true, IMUL: true, IN: true, INC: true, LEA: true, MOV: true, MOVNTI: true, MUL: true, NEG: true, NOP: true, NOT: true,
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Jul 12 20:38:21 UTC 2023 - 7.2K bytes - Viewed (0) -
src/net/mail/message_test.go
exp string }{ { &Address{Address: "******@****.***"}, "<******@****.***>", }, { // quoted local parts: RFC 5322, 3.4.1. and 3.2.4. &Address{Address: `my@idiot@******@****.***`}, `<"my@idiot@address"@example.com>`, }, { // quoted local parts &Address{Address: ` @example.com`}, `<" "@example.com>`, }, { &Address{Name: "Bob", Address: "******@****.***"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Mar 19 11:31:03 UTC 2024 - 30.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64enc.s
IDIVQ (BX) // 48f73b IDIVQ (R11) // 49f73b IDIVQ DX // 48f7fa IDIVQ R11 // 49f7fb IDIVB (BX) // f63b IDIVB (R11) // 41f63b IDIVB DL // f6fa IDIVB R11 // 41f6fb
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Oct 08 21:38:44 UTC 2021 - 581.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
{name: "DIVQ", argLength: 2, reg: gp11div, typ: "(Int64,Int64)", asm: "IDIVQ", aux: "Bool", clobberFlags: true}, {name: "DIVL", argLength: 2, reg: gp11div, typ: "(Int32,Int32)", asm: "IDIVL", aux: "Bool", clobberFlags: true}, {name: "DIVW", argLength: 2, reg: gp11div, typ: "(Int16,Int16)", asm: "IDIVW", aux: "Bool", clobberFlags: true},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Aug 04 16:40:24 UTC 2023 - 98K bytes - Viewed (1)