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Results 1 - 10 of 252 for dmul (0.04 sec)

  1. src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go

    	DENBCDQCC:      "denbcdq.",
    	DIEX:           "diex",
    	DIEXCC:         "diex.",
    	DIEXQCC:        "diexq.",
    	DIEXQ:          "diexq",
    	DMUL:           "dmul",
    	DMULCC:         "dmul.",
    	DMULQ:          "dmulq",
    	DMULQCC:        "dmulq.",
    	DQUA:           "dqua",
    	DQUACC:         "dqua.",
    	DQUAI:          "dquai",
    	DQUAICC:        "dquai.",
    	DQUAIQ:         "dquaiq",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Nov 22 17:16:14 UTC 2022
    - 334.7K bytes
    - Viewed (0)
  2. test/codegen/floats.go

    	// arm/7:"ADDD",-"MULD"
    	// arm64:"FADDD",-"FMULD"
    	// ppc64x:"FADD",-"FMUL"
    	// riscv64:"FADDD",-"FMULD"
    	return f * 2.0
    }
    
    func DivPow2(f1, f2, f3 float64) (float64, float64, float64) {
    	// 386/sse2:"MULSD",-"DIVSD"
    	// amd64:"MULSD",-"DIVSD"
    	// arm/7:"MULD",-"DIVD"
    	// arm64:"FMULD",-"FDIVD"
    	// ppc64x:"FMUL",-"FDIV"
    	// riscv64:"FMULD",-"FDIVD"
    	x := f1 / 16.0
    
    	// 386/sse2:"MULSD",-"DIVSD"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Apr 04 15:24:29 UTC 2024
    - 4.9K bytes
    - Viewed (0)
  3. src/math/sinh_s390x.s

    	BEQ     L9
    	WFMSDB  V0, V1, V6, V0
    	MOVD    $sinhx4ff<>+0(SB), R3
    	FNEG    F0, F0
    	FMOVD   0(R3), F2
    	FMUL    F2, F0
    	ANDW    $0xFFFF, R2
    	WORD    $0xA53FEFB6     //llill %r3,61366
    	SUBW    R2, R3, R2
    	RISBGN	$0, $15, $48, R2, R1
    	LDGR    R1, F2
    	FMUL    F2, F0
    	FMOVD   F0, ret+8(FP)
    	RET
    
    L20:
    	MOVD    $sinhxadd<>+0(SB), R2
    	FMOVD   0(R2), F2
    	MOVD    sinhrlog2<>+0(SB), R2
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 17 13:54:10 UTC 2021
    - 6K bytes
    - Viewed (0)
  4. tensorflow/compiler/mlir/lite/stablehlo/tests/legalize-tfl-stablehlo-mul.mlir

    Eugene Burmako <******@****.***> 1671166704 -0800
    Registered: Sun Jun 16 05:45:23 UTC 2024
    - Last Modified: Fri Dec 16 05:09:09 UTC 2022
    - 751 bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/AMD64.rules

    (Sub(32|64)F ...) => (SUBS(S|D) ...)
    
    (Mul(64|32|16|8) ...) => (MUL(Q|L|L|L) ...)
    (Mul(32|64)F ...) => (MULS(S|D) ...)
    
    (Select0 (Mul64uover x y)) => (Select0 <typ.UInt64> (MULQU x y))
    (Select0 (Mul32uover x y)) => (Select0 <typ.UInt32> (MULLU x y))
    (Select1 (Mul(64|32)uover x y)) => (SETO (Select1 <types.TypeFlags> (MUL(Q|L)U x y)))
    
    (Hmul(64|32) ...) => (HMUL(Q|L) ...)
    (Hmul(64|32)u ...) => (HMUL(Q|L)U ...)
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Mar 12 19:38:41 UTC 2024
    - 93.9K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/arch/loong64.go

    		return true
    	}
    	return false
    }
    
    // IsLoong64MUL reports whether the op (as defined by an loong64.A* constant) is
    // one of the MUL/DIV/REM instructions that require special handling.
    func IsLoong64MUL(op obj.As) bool {
    	switch op {
    	case loong64.AMUL, loong64.AMULU, loong64.AMULV, loong64.AMULVU,
    		loong64.ADIV, loong64.ADIVU, loong64.ADIVV, loong64.ADIVVU,
    		loong64.AREM, loong64.AREMU, loong64.AREMV, loong64.AREMVU:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 02:04:54 UTC 2024
    - 2.1K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/test/fixedbugs_test.go

    		t.Errorf("line number missing in assembly:\n%s", out)
    	}
    }
    
    var issue16214src = `
    package main
    
    func Mod32(x uint32) uint32 {
    	return x % 3 // frontend rewrites it as HMUL with 2863311531, the LITERAL node has unknown Pos
    }
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Feb 06 18:07:35 UTC 2023
    - 2.1K bytes
    - Viewed (0)
  8. src/math/sin_s390x.s

    	FMADD   F1, F6, F4
    	FMOVD   0(R2), F1
    	FMADD   F3, F2, F1
    	FMUL    F0, F2
    	WFMADB  V6, V4, V1, V6
    	TMLL	R1, $2
    	FMADD   F6, F2, F0
    	BNE     L34
    	FMOVD   F0, ret+8(FP)
    	RET
    
    L33:
    	MOVD    $sincosxnan<>+0(SB), R1
    	FMOVD   0(R1), F0
    	FMOVD   F0, ret+8(FP)
    	RET
    
    L36:
    	FMUL    F0, F0
    	MOVD    $sincosc0<>+0(SB), R1
    	WFMDB   V0, V0, V1
    	WFMADB  V0, V4, V20, V4
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 31 04:25:54 UTC 2023
    - 8.6K bytes
    - Viewed (0)
  9. src/crypto/internal/nistec/fiat/p256_invert.go

    	var t1 = new(P256Element)
    
    	z.Square(x)
    	z.Mul(x, z)
    	z.Square(z)
    	z.Mul(x, z)
    	t0.Square(z)
    	for s := 1; s < 3; s++ {
    		t0.Square(t0)
    	}
    	t0.Mul(z, t0)
    	t1.Square(t0)
    	for s := 1; s < 6; s++ {
    		t1.Square(t1)
    	}
    	t0.Mul(t0, t1)
    	for s := 0; s < 3; s++ {
    		t0.Square(t0)
    	}
    	z.Mul(z, t0)
    	t0.Square(z)
    	t0.Mul(x, t0)
    	t1.Square(t0)
    	for s := 1; s < 16; s++ {
    		t1.Square(t1)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 05 21:53:03 UTC 2022
    - 1.7K bytes
    - Viewed (0)
  10. src/crypto/internal/nistec/fiat/p384_invert.go

    	z.Square(x)
    	z.Mul(x, z)
    	z.Square(z)
    	t1.Mul(x, z)
    	z.Square(t1)
    	for s := 1; s < 3; s++ {
    		z.Square(z)
    	}
    	z.Mul(t1, z)
    	t0.Square(z)
    	for s := 1; s < 6; s++ {
    		t0.Square(t0)
    	}
    	t0.Mul(z, t0)
    	t2.Square(t0)
    	for s := 1; s < 12; s++ {
    		t2.Square(t2)
    	}
    	t0.Mul(t0, t2)
    	for s := 0; s < 6; s++ {
    		t0.Square(t0)
    	}
    	z.Mul(z, t0)
    	t0.Square(z)
    	t2.Mul(x, t0)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 12 00:04:29 UTC 2022
    - 2.1K bytes
    - Viewed (0)
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