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Results 1 - 5 of 5 for MOVL (0.04 sec)
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src/cmd/asm/internal/asm/testdata/386enc.s
MOVL 2147483648(AX), AX // 8b8000000080 MOVL -2147483648(AX), AX // 8b8000000080 ADDL 2147483648(AX), AX // 038000000080 ADDL -2147483648(AX), AX // 038000000080 // Make sure MOV CR/DR continues to work after changing its movtabs. MOVL CR0, AX // 0f20c0 MOVL CR0, DX // 0f20c2 MOVL CR4, DI // 0f20e7 MOVL AX, CR0 // 0f22c0 MOVL DX, CR0 // 0f22c2 MOVL DI, CR4 // 0f22e7
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Apr 11 18:32:50 UTC 2023 - 1.2K bytes - Viewed (0) -
lib/fips140/v1.0.0.zip
DX LEAL (SI)(DX*1), DI MOVL DI, 288(SP) CMPL SI, DI JEQ end LEAL 256(SP), DI // variables MOVL dig+0(FP), BP MOVL (0*4)(BP), AX // a = H0 MOVL AX, (0*4)(DI) MOVL (1*4)(BP), BX // b = H1 MOVL BX, (1*4)(DI) MOVL (2*4)(BP), CX // c = H2 MOVL CX, (2*4)(DI) MOVL (3*4)(BP), DX // d = H3 MOVL DX, (3*4)(DI) MOVL (4*4)(BP), AX // e = H4 MOVL AX, (4*4)(DI) MOVL (5*4)(BP), BX // f = H5 MOVL BX, (5*4)(DI) MOVL (6*4)(BP), CX // g = H6 MOVL CX, (6*4)(DI) MOVL (7*4)(BP), DX // h = H7 MOVL DX, (7*4)(DI) loop: MOVL...
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jan 29 15:10:35 UTC 2025 - 635K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
// Copyright 2016 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. TEXT errors(SB),$0 MOVL foo<>(SB)(AX), AX // ERROR "invalid instruction" MOVL (AX)(SP*1), AX // ERROR "invalid instruction" EXTRACTPS $4, X2, (BX) // ERROR "invalid instruction" EXTRACTPS $-1, X2, (BX) // ERROR "invalid instruction" // VSIB addressing does not permit non-vector (X/Y)
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Jun 14 00:03:57 UTC 2023 - 8.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s
// Test to make sure that if we use R15 after it is clobbered by // a global variable access while dynamic linking, we get an error. // See issue 43661. TEXT ·a1(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MOVL $0, R15 RET TEXT ·a2(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MOVQ $0, R15 RET TEXT ·a3(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 XORL R15, R15 RET TEXT ·a4(SB), 0, $0-0
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Wed Mar 15 20:45:41 UTC 2023 - 4.8K bytes - Viewed (0) -
doc/asm.html
<p> For example, the sequence to load <code>g</code> and <code>m</code> using <code>CX</code> looks like this: </p> <pre> #include "go_tls.h" #include "go_asm.h" ... get_tls(CX) MOVL g(CX), AX // Move g into AX. MOVL g_m(AX), BX // Move g.m into BX. </pre> <p> The <code>get_tls</code> macro is also defined on <a href="#amd64">amd64</a>. </p> <p> Addressing modes: </p> <ul>
Registered: Tue Sep 09 11:13:09 UTC 2025 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0)