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src/cmd/asm/internal/asm/operand_test.go
{"(BP)(DX*4)", "(BP)(DX*4)"}, {"(BP)(R8*4)", "(BP)(R8*4)"}, {"(BX)", "(BX)"}, {"(DI)", "(DI)"}, {"(DI)(BX*1)", "(DI)(BX*1)"}, {"(DX)", "(DX)"}, {"(R9)", "(R9)"}, {"(R9)(BX*8)", "(R9)(BX*8)"}, {"(SI)", "(SI)"}, {"(SI)(BX*1)", "(SI)(BX*1)"}, {"(SI)(DX*1)", "(SI)(DX*1)"}, {"(SP)", "(SP)"}, {"(SP)(AX*4)", "(SP)(AX*4)"}, {"32(SP)(BX*2)", "32(SP)(BX*2)"}, {"32323(SP)(R8*4)", "32323(SP)(R8*4)"},Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Aug 29 18:31:05 GMT 2023 - 23.9K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
// CLWB instructions: CLWB BX // ERROR "invalid instruction" // CLDEMOTE instructions: CLDEMOTE BX // ERROR "invalid instruction" // WAITPKG instructions: TPAUSE (BX) // ERROR "invalid instruction" UMONITOR (BX) // ERROR "invalid instruction" UMWAIT (BX) // ERROR "invalid instruction"
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Wed Jun 14 00:03:57 GMT 2023 - 8.9K bytes - Click Count (0) -
lib/fips140/v1.0.0-c2097c7c.zip
X4 AESENCLAST X0, X5 AESENCLAST X0, X6 AESENCLAST X0, X7 AESENCLAST X0, X8 MOVUPS (BX), X0 PXOR X1, X0 MOVUPS X0, (DX) MOVUPS 16(BX), X0 PXOR X2, X0 MOVUPS X0, 16(DX) MOVUPS 32(BX), X0 PXOR X3, X0 MOVUPS X0, 32(DX) MOVUPS 48(BX), X0 PXOR X4, X0 MOVUPS X0, 48(DX) MOVUPS 64(BX), X0 PXOR X5, X0 MOVUPS X0, 64(DX) MOVUPS 80(BX), X0 PXOR X6, X0 MOVUPS X0, 80(DX) MOVUPS 96(BX), X0 PXOR X7, X0 MOVUPS X0, 96(DX) MOVUPS 112(BX), X0 PXOR X8, X0 MOVUPS X0, 112(DX) RET golang.org/fips140@v1.0.0-c2097c7c/fips14...
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Sep 25 19:53:19 GMT 2025 - 642.7K bytes - Click Count (0) -
lib/fips140/v1.26.0.zip
X4 AESENCLAST X0, X5 AESENCLAST X0, X6 AESENCLAST X0, X7 AESENCLAST X0, X8 MOVUPS (BX), X0 PXOR X1, X0 MOVUPS X0, (DX) MOVUPS 16(BX), X0 PXOR X2, X0 MOVUPS X0, 16(DX) MOVUPS 32(BX), X0 PXOR X3, X0 MOVUPS X0, 32(DX) MOVUPS 48(BX), X0 PXOR X4, X0 MOVUPS X0, 48(DX) MOVUPS 64(BX), X0 PXOR X5, X0 MOVUPS X0, 64(DX) MOVUPS 80(BX), X0 PXOR X6, X0 MOVUPS X0, 80(DX) MOVUPS 96(BX), X0 PXOR X7, X0 MOVUPS X0, 96(DX) MOVUPS 112(BX), X0 PXOR X8, X0 MOVUPS X0, 112(DX) RET golang.org/fips140@v1.26.0/fips140/v1.26.0/aes/ctr_arm64.s...
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Jan 08 17:58:32 GMT 2026 - 660.3K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64enc_extra.s
// Zevex_rm_v_r. VADDPD Z2, Z9, Z21 // 62e1b54858ea VADDPD Z21, Z2, Z9 // 6231ed4858cd VADDPD Z9, Z21, Z2 // 62d1d54058d1 CLWB (BX) // 660fae33 CLDEMOTE (BX) // 0f1c03 TPAUSE BX // 660faef3 UMONITOR BX // f30faef3 UMWAIT BX // f20faef3 RDPID DX // f30fc7fa RDPID R11 // f3410fc7fb ENDBR64 // f30f1efa
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Feb 20 11:20:03 GMT 2025 - 57.7K bytes - Click Count (0) -
src/cmd/asm/internal/lex/lex_test.go
"\tPINSRW $index, (BP)(R8*4), xmm", "#define LOAD(off, reg) \\", "\tMOVBLZX (off*4)(R12), reg \\", "\tADDB reg, DX", "KEYROUND(X0, LOAD, 8, AX, BX, 0)", ), "\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n", }, { "taken #ifdef", lines( "#define A", "#ifdef A",
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Aug 29 07:48:38 GMT 2023 - 5.8K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/amd64dynlinkerror.s
TEXT ·a14(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MULXQ R15, AX, BX // ERROR "when dynamic linking, R15 is clobbered by a global variable access and is used here" RET TEXT ·a15(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MULXQ AX, R15, BX ADDQ $1, R15 RET TEXT ·a16(SB), 0, $0-0 CMPL runtime·writeBarrier(SB), $0 MULXQ AX, BX, R15 ADDQ $1, R15 RET TEXT ·a17(SB), 0, $0-0
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Nov 20 19:05:03 GMT 2025 - 4.9K bytes - Click Count (0) -
doc/asm.html
get_tls(CX) MOVL g(CX), AX // Move g into AX. MOVL g_m(AX), BX // Move g.m into BX. </pre> <p> The <code>get_tls</code> macro is also defined on <a href="#amd64">amd64</a>. </p> <p> Addressing modes: </p> <ul> <li> <code>(DI)(BX*2)</code>: The location at address <code>DI</code> plus <code>BX*2</code>. </li> <li>
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Nov 14 19:09:46 GMT 2025 - 36.5K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arm.go
"DBW": arm.C_WBIT | arm.C_PBIT, "DAW": arm.C_WBIT, "IB": arm.C_PBIT | arm.C_UBIT, "IA": arm.C_UBIT, "DB": arm.C_PBIT, "DA": 0, } var armJump = map[string]bool{ "B": true, "BL": true, "BX": true, "BEQ": true, "BNE": true, "BCS": true, "BHS": true, "BCC": true, "BLO": true, "BMI": true, "BPL": true, "BVS": true, "BVC": true, "BHI": true, "BLS": true,
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Wed Oct 23 15:18:14 GMT 2024 - 6.1K bytes - Click Count (0) -
src/main/webapp/js/admin/jquery-3.7.1.min.map
uBAAwBV,IAC9C7F,EAKT,KAAMiD,EAAwBjH,EAAW,MACrC0G,GAAcA,EAAUnC,KAAMvE,IAAe,CAYhD,GAVAiK,EAAcjK,EACdkK,EAAajK,EASK,IAAb5B,IACFqJ,EAASnD,KAAMvE,IAAcyH,EAAmBlD,KAAMvE,IAAe,EAGvEkK,EAAazB,EAASlE,KAAMvE,IAAcwK,EAAavK,EAAQP,aAC9DO,IAQkBA,GAAY/B,GAAQuM,SAG/BX,EAAM7J,EAAQX,aAAc,OAClCwK,EAAM/J,GAAOkG,eAAgB6D,GAE7B7J,EAAQV,aAAc,KAAQuK,EAAM9G,IAMtC/D,GADA+K,EAASU,EAAU1K,IACRK,OACX,MAAQpB,IACP+K,EAAQ/K,IAAQ6K,EAAM,IAAMA,EAAM,UAAa,IAC9Ca,EAAYX,EAAQ/K,IAEtBgL,EAAcD,EAAOY,KAAM,KAG5B,IAIC,OAHAlN,EAAKD,MAAOuG,EAC...
Created: Tue Mar 31 13:07:34 GMT 2026 - Last Modified: Sat Oct 26 01:07:52 GMT 2024 - 131.6K bytes - Click Count (0)