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Results 1 - 7 of 7 for vsraw (0.08 sec)

  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    	VSRH V1, V2, V3                 // 10611244
    	VSRW V1, V2, V3                 // 10611284
    	VSRD V1, V2, V3                 // 106116c4
    	VSR V1, V2, V3                  // 106112c4
    	VSRO V1, V2, V3                 // 1061144c
    	VSLD V1, V2, V3                 // 106115c4
    	VSRAB V1, V2, V3                // 10611304
    	VSRAH V1, V2, V3                // 10611344
    	VSRAW V1, V2, V3                // 10611384
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
  2. src/cmd/internal/obj/ppc64/asm9.go

    			opset(AVSRH, r0)
    			opset(AVSRW, r0)
    			opset(AVSR, r0)
    			opset(AVSRO, r0)
    			opset(AVSLD, r0)
    			opset(AVSRD, r0)
    
    		case AVSA: /* vsrab, vsrah, vsraw, vsrad */
    			opset(AVSRAB, r0)
    			opset(AVSRAH, r0)
    			opset(AVSRAW, r0)
    			opset(AVSRAD, r0)
    
    		case AVSOI: /* vsldoi */
    			opset(AVSLDOI, r0)
    
    		case AVCLZ: /* vclzb, vclzh, vclzw, vclzd */
    			opset(AVCLZB, r0)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 15 13:55:28 UTC 2024
    - 156.1K bytes
    - Viewed (0)
  3. test/codegen/shift.go

    	return v >> (s & 31)
    }
    
    func rshMask32x64(v int32, s uint64) int32 {
    	// arm64:"ASR",-"AND"
    	// ppc64x:"ISEL",-"ORN"
    	// riscv64:"SRAW","OR","SLTIU"
    	// s390x:-"RISBGZ",-"AND",-"LOCGR"
    	return v >> (s & 63)
    }
    
    func rsh5Mask32x64(v int32, s uint64) int32 {
    	// riscv64:"SRAW",-"OR",-"SLTIU"
    	return v >> (s & 31)
    }
    
    func lshMask64x32(v int64, s uint32) int64 {
    	// arm64:"LSL",-"AND"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue May 21 18:53:43 UTC 2024
    - 12.7K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/PPC64Ops.go

    		{name: "SRAD", argLength: 2, reg: gp21cxer, asm: "SRAD"}, // signed arg0 >> (arg1&127), 64 bit width (note: 127, not 63!)
    		{name: "SRAW", argLength: 2, reg: gp21cxer, asm: "SRAW"}, // signed arg0 >> (arg1&63), 32 bit width
    		{name: "SRD", argLength: 2, reg: gp21, asm: "SRD"},       // unsigned arg0 >> (arg1&127), 64 bit width
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 43.8K bytes
    - Viewed (0)
  5. src/cmd/compile/internal/ssa/_gen/PPC64.rules

    (Rsh32x(64|32)     <t> x y)  => (ISEL [0] (SRAW    <t> x y) (SRAWconst <t> x [31]) (CMP(U|WU)const y [32]))
    (Rsh32x16          <t> x y)  => (ISEL [2] (SRAW    <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0xFFE0] y)))
    (Rsh32x8           <t> x y)  => (ISEL [2] (SRAW    <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0x00E0] y)))
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 53.2K bytes
    - Viewed (0)
  6. src/cmd/compile/internal/ssa/rewritePPC64.go

    	// match: (Rsh32x16 x y)
    	// cond: shiftIsBounded(v)
    	// result: (SRAW x y)
    	for {
    		x := v_0
    		y := v_1
    		if !(shiftIsBounded(v)) {
    			break
    		}
    		v.reset(OpPPC64SRAW)
    		v.AddArg2(x, y)
    		return true
    	}
    	// match: (Rsh32x16 <t> x y)
    	// result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0xFFE0] y)))
    	for {
    		t := v.Type
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Jun 07 19:02:52 UTC 2024
    - 360.2K bytes
    - Viewed (0)
  7. src/cmd/compile/internal/ssa/opGen.go

    			outputs: []outputInfo{
    				{0, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
    			},
    		},
    	},
    	{
    		name:   "SRAW",
    		argLen: 2,
    		asm:    ppc64.ASRAW,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 1073733630}, // SP SB R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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