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  1. src/main/java/org/codelibs/fess/exec/SuggestCreator.java

            final SuggestCreator creator = ComponentUtil.getComponent(SuggestCreator.class);
            final LocalDateTime startTime = LocalDateTime.now();
            int ret = creator.create();
            if (ret == 0) {
                ret = creator.purge(startTime);
            }
            return ret;
        }
    
        private int create() {
            if (!ComponentUtil.getFessConfig().isSuggestDocuments() && !ComponentUtil.getFessConfig().isSuggestSearchLog()) {
    Created: Tue Mar 31 13:07:34 GMT 2026
    - Last Modified: Thu Mar 26 02:24:08 GMT 2026
    - 12.1K bytes
    - Click Count (0)
  2. src/main/java/org/codelibs/fess/app/job/ScriptExecutorJob.java

                } else if (scheduledJob.isLoggingEnabled() && logger.isInfoEnabled()) {
                    logger.info("Starting job: id={}", id);
                }
    
                final Object ret = jobExecutor.execute(Constants.DEFAULT_SCRIPT, script);
                if (ret == null) {
                    if (scheduledJob.isLoggingEnabled() && logger.isInfoEnabled()) {
                        logger.info("Finished job: id={}", id);
                    }
    Created: Tue Mar 31 13:07:34 GMT 2026
    - Last Modified: Sat Mar 28 11:55:54 GMT 2026
    - 5.7K bytes
    - Click Count (0)
  3. android/guava/src/com/google/common/math/Quantiles.java

       * as a pivot. Returns the index which the slice is partitioned around, i.e. if it returns {@code
       * ret} then we know that the values with indexes in [{@code from}, {@code ret}) are less than or
       * equal to the value at {@code ret} and the values with indexes in ({@code ret}, {@code to}] are
       * greater than or equal to that.
       */
      private static int partition(double[] array, int from, int to) {
    Created: Fri Apr 03 12:43:13 GMT 2026
    - Last Modified: Mon Mar 23 21:06:42 GMT 2026
    - 30.1K bytes
    - Click Count (0)
  4. src/cmd/asm/internal/flags/flags.go

    	Importpath = flag.String("p", obj.UnlinkablePkg, "set expected package import to path")
    	Spectre    = flag.String("spectre", "", "enable spectre mitigations in `list` (all, ret)")
    	Std        = flag.Bool("std", false, "building standard library")
    )
    
    var DebugFlags struct {
    	CompressInstructions int    `help:"use compressed instructions when possible (if supported by architecture)"`
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Apr 02 17:07:18 GMT 2026
    - 3K bytes
    - Click Count (0)
  5. src/cmd/asm/main.go

    		os.Exit(2)
    	case "":
    		// nothing
    	case "index":
    		// known to compiler; ignore here so people can use
    		// the same list with -gcflags=-spectre=LIST and -asmflags=-spectre=LIST
    	case "all", "ret":
    		ctxt.Retpoline = true
    	}
    
    	ctxt.Bso = bufio.NewWriter(os.Stdout)
    	defer ctxt.Bso.Flush()
    
    	architecture.Init(ctxt)
    
    	// Create object file, write header.
    	buf, err := bio.Create(*flags.OutputFile)
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Thu Apr 02 17:07:18 GMT 2026
    - 3K bytes
    - Click Count (0)
  6. src/cmd/asm/internal/asm/testdata/arm64.s

    	CASPW	(R6, R7), (R8), (R4, R5)             // 047d2608
    	CASPD	(R2, R3), (R2), (R8, R9)             // 487c2248
    
    // RET
    	RET                                        // c0035fd6
    	RET R0					   // 00005fd6
    	RET R6					   // c0005fd6
    	RET R27					   // 60035fd6
    	RET R30					   // c0035fd6
    	RET	foo(SB)
    
    // B/BL/B.cond cases, and canonical names JMP, CALL.
    	BL	1(PC)      // CALL 1(PC)
    	BL	(R2)       // CALL (R2)
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Feb 27 20:41:17 GMT 2026
    - 96.2K bytes
    - Click Count (0)
  7. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	//TODO PRFM (R27)(R30.SXTW<<3), PLDL2STRM  // 63dbbff8
    	//TODO PRFUM 22(R16), PSTL1KEEP            // 106281f8
    	RBITW R9, R22                              // 3601c05a
    	RBIT R11, R4                               // 6401c0da
    	RET                                        // c0035fd6
    	REVW R8, R10                               // 0a09c05a
    	REV R1, R2                                 // 220cc0da
    	REV16W R21, R19                            // b306c05a
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Feb 24 21:29:25 GMT 2026
    - 44K bytes
    - Click Count (0)
  8. src/cmd/asm/internal/asm/testdata/arm64error.s

    	AUTIB1716	R0                                       // ERROR "illegal combination"
    	SB	$1                                               // ERROR "illegal combination"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Tue Feb 24 21:29:25 GMT 2026
    - 38.5K bytes
    - Click Count (0)
  9. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	VRGATHEREI16VV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
    	VRGATHERVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
    	VRGATHERVI	$16, V2, V4, V3			// ERROR "invalid vector mask register"
    
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Wed Apr 01 04:17:57 GMT 2026
    - 27.2K bytes
    - Click Count (0)
  10. src/cmd/asm/internal/asm/testdata/arm64sveerror.s

    	ZZIPQ1 Z1.S, Z26.S, Z11.B                         // ERROR "illegal combination from SVE"
    	ZZIPQ2 Z1.S, Z26.S, Z11.B                         // ERROR "illegal combination from SVE"
    Created: Tue Apr 07 11:13:11 GMT 2026
    - Last Modified: Fri Mar 20 17:02:17 GMT 2026
    - 50.6K bytes
    - Click Count (0)
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