FCVTLS.RUP	F0, X5				// d33220c0
	FCVTLS.RMM	F0, X5				// d34220c0
	FCVTSW	X5, F0					// 538002d0
	FCVTSL	X5, F0					// 538022d0
	FCVTWUS	F0, X5					// d31210c0
	FCVTWUS.RNE	F0, X5				// d30210c0
	FCVTWUS.RTZ	F0, X5				// d31210c0
	FCVTWUS.RDN	F0, X5				// d32210c0
	FCVTWUS.RUP	F0, X5				// d33210c0
	FCVTWUS.RMM	F0, X5				// d34210c0
	FCVTLUS	F0, X5					// d31230c0
	FCVTLUS.RNE	F0, X5				// d30230c0

	FMINAD		F4, F5		// a5100f01

	FTINTRMWF	F0, F2		// 02041a01
	FTINTRMWD	F0, F2		// 02081a01
	FTINTRMVF	F0, F2		// 02241a01
	FTINTRMVD	F0, F2		// 02281a01
	FTINTRPWF	F0, F2		// 02441a01
	FTINTRPWD	F0, F2		// 02481a01
	FTINTRPVF	F0, F2		// 02641a01
	FTINTRPVD	F0, F2		// 02681a01
	FTINTRZWF	F0, F2		// 02841a01
	FTINTRZWD	F0, F2		// 02881a01
	FTINTRZVF	F0, F2		// 02a41a01
	FTINTRZVD	F0, F2		// 02a81a01

	FSTPD	(R1, R2), (R0)                                   // ERROR "invalid register pair"
	FMOVS	(F2), F0                                         // ERROR "illegal combination"
	FMOVD	F0, (F1)                                         // ERROR "illegal combination"
	LDADDAD	R5, (R6), RSP                                    // ERROR "illegal combination"

	FMOVS	$(4.0), F0                      // 0010221e
	FMOVD	$(4.0), F0                      // 0010621e
	FMOVS	$(0.265625), F1                 // 01302a1e
	FMOVD	$(0.1796875), F2                // 02f0681e
	FMOVS	$(0.96875), F3                  // 03f02d1e
	FMOVD	$(28.0), F4                     // 0490671e
	FMOVD	$0, F0                          // e003679e
	FMOVS	$0, F0                          // e003271e

00000f0 ff 42 88 21 c4 00 00 00 00 ff ff 00 00 00 ff ff
0000100 00 34 00 cb ff 42 e8 21 5e 0f 00 00 00 ff ff 0a
0000110 f0 66 64 12 61 c0 15 dc e8 a0 48 bf 48 af 2a b3
0000120 20 c0 9b 95 0d c4 67 04 42 53 06 06 06 40 00 06
0000130 00 f9 ff 6d 01 00 00 00 00 42 e8 21 5e 0f 00 00
0000140 00 ff ff 0a f0 66 64 12 61 c0 15 dc e8 a0 48 bf
0000150 48 af 2a b3 20 c0 9b 95 0d c4 67 04 42 53 06 06

</li>

</ul>

<h3 id="mips">MIPS, MIPS64</h3>

<p>
General purpose registers are named <code>R0</code> through <code>R31</code>,
floating point registers are <code>F0</code> through <code>F31</code>.
</p>

<p>
<code>R30</code> is reserved to point to <code>g</code>.
<code>R23</code> is used as a temporary register.
</p>

<p>

for u = range 256 {
}

// invalid: 1e3 is a floating-point constant
for range 1e3 {
}

// fibo generates the Fibonacci sequence
fibo := func(yield func(x int) bool) {
	f0, f1 := 0, 1
	for yield(f0) {
		f0, f1 = f1, f0+f1
	}
}

// print the Fibonacci numbers below 1000:
for x := range fibo {
	if x >= 1000 {
		break
	}
	fmt.Printf("%d ", x)
}