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Results 1 - 10 of 202 for r8 (0.02 sec)

  1. src/crypto/internal/bigmod/nat_amd64.s

    	ADCXQ BX, R8
    	ADOXQ 32(AX), R8
    	MOVQ  R8, 32(AX)
    
    	// Iteration 5
    	MULXQ 40(CX), R8, BX
    	ADCXQ DI, R8
    	ADOXQ 40(AX), R8
    	MOVQ  R8, 40(AX)
    
    	// Iteration 6
    	MULXQ 48(CX), R8, DI
    	ADCXQ BX, R8
    	ADOXQ 48(AX), R8
    	MOVQ  R8, 48(AX)
    
    	// Iteration 7
    	MULXQ 56(CX), R8, BX
    	ADCXQ DI, R8
    	ADOXQ 56(AX), R8
    	MOVQ  R8, 56(AX)
    
    	// Iteration 8
    	MULXQ 64(CX), R8, DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 24 22:37:58 UTC 2023
    - 17.3K bytes
    - Viewed (0)
  2. src/internal/bytealg/index_amd64.s

    	JA   _5_or_more
    	MOVL (R8), R8
    	LEAQ -3(DI)(DX*1), DX
    loop4:
    	MOVL (DI), SI
    	CMPL SI,R8
    	JZ   success
    	ADDQ $1,DI
    	CMPQ DI,DX
    	JB loop4
    	JMP fail
    _5_or_more:
    	CMPQ AX, $7
    	JA   _8_or_more
    	LEAQ 1(DI)(DX*1), DX
    	SUBQ AX, DX
    	MOVL -4(R8)(AX*1), BX
    	MOVL (R8), R8
    loop5to7:
    	MOVL (DI), SI
    	CMPL SI,R8
    	JZ   partial_success5to7
    	ADDQ $1,DI
    	CMPQ DI,DX
    	JB loop5to7
    	JMP fail
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 07 00:20:48 UTC 2023
    - 5.1K bytes
    - Viewed (0)
  3. src/cmd/vendor/golang.org/x/sys/unix/asm_zos_s390x.s

    DATA zosLibVec<>(SB)/8, $0
    GLOBL zosLibVec<>(SB), NOPTR, $8
    
    TEXT ·initZosLibVec(SB), NOSPLIT|NOFRAME, $0-0
    	MOVW PSALAA, R8
    	MOVD LCA64(R8), R8
    	MOVD CAA(R8), R8
    	MOVD EDCHPXV(R8), R8
    	MOVD R8, zosLibVec<>(SB)
    	RET
    
    TEXT ·GetZosLibVec(SB), NOSPLIT|NOFRAME, $0-0
    	MOVD zosLibVec<>(SB), R8
    	MOVD R8, ret+0(FP)
    	RET
    
    TEXT ·clearErrno(SB), NOSPLIT, $0-0
    	BL   addrerrno<>(SB)
    	MOVD $0, 0(R3)
    	RET
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 08 16:12:58 UTC 2024
    - 11.2K bytes
    - Viewed (0)
  4. src/math/big/arith_s390x.s

    largeLoop:  // Copying 256 bytes at a time.
    	MVC    $256, 0(R6), 0(R8)
    	MOVD   $256(R6), R6
    	MOVD   $256(R8), R8
    	MOVD   $-32(R5), R5
    	CMPBGE R5, $32, largeLoop
    	BR     mediumLoop
    
    mediumLoopBody:  // Copying 32 bytes at a time
    	MVC    $32, 0(R6), 0(R8)
    	MOVD   $32(R6), R6
    	MOVD   $32(R8), R8
    	MOVD   $-4(R5), R5
    	CMPBGE R5, $4, mediumLoopBody
    	BR     smallLoop
    
    returnC:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 20.3K bytes
    - Viewed (0)
  5. src/internal/bytealg/compare_loong64.s

    chunk16_loop:
    	BEQ	R0, R14, byte_loop
    	MOVV	(R4), R8
    	MOVV	(R6), R9
    	BNE	R8, R9, byte_loop
    	MOVV	8(R4), R16
    	MOVV	8(R6), R17
    	ADDV	$16, R4
    	ADDV	$16, R6
    	SUBVU	$1, R14
    	BEQ	R16, R17, chunk16_loop
    	SUBV	$8, R4
    	SUBV	$8, R6
    
    byte_loop:
    	BEQ	R4, R12, samebytes
    	MOVBU	(R4), R8
    	ADDVU	$1, R4
    	MOVBU	(R6), R9
    	ADDVU	$1, R6
    	BEQ	R8, R9, byte_loop
    
    byte_cmp:
    	SGTU	R8, R9, R4 // R12 = 1 if (R8 > R9)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 13 15:04:25 UTC 2024
    - 1.7K bytes
    - Viewed (0)
  6. src/internal/bytealg/equal_ppc64x.s

    	// alignment requirements.
    	ANDCC	$PAGE_OFFSET, R8, R6	// &sX & PAGE_OFFSET
    	ANDCC	$PAGE_OFFSET, R4, R9
    	SUBC	R5, $8, R12		// 8-len
    	SLD	$3, R12, R14		// (8-len)*8
    	CMPU	R6, R12, CR1		// Enough bytes lower in the page to load lower?
    	CMPU	R9, R12, CR0
    	SUB	R12, R8, R6		// compute lower load address
    	SUB	R12, R4, R9
    	ISEL	CR1LT, R8, R6, R8	// R8 = R6 < 0 ? R8 (&s1) : R6 (&s1 - (8-len))
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:47:45 UTC 2023
    - 4.9K bytes
    - Viewed (0)
  7. src/crypto/subtle/xor_ppc64x.s

    	MOVWZ	(R5)(R8), R15
    	XOR	R14, R15, R16
    	MOVW	R16, (R3)(R8)
    	ADD	$4,R8
    	ADD	$-4,R6
    xor2:
    	CMP	R6, $2
    	BLT	xor1
    	MOVHZ	(R4)(R8), R14
    	MOVHZ	(R5)(R8), R15
    	XOR	R14, R15, R16
    	MOVH	R16, (R3)(R8)
    	ADD	$2,R8
    	ADD	$-2,R6
    xor1:
    	CMP	R6, $0
    	BC	12,2,LR		// BEQLR
    	MOVBZ	(R4)(R8), R14	// R14 = a[i]
    	MOVBZ	(R5)(R8), R15	// R15 = b[i]
    	XOR	R14, R15, R16	// R16 = a[i] ^ b[i]
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  8. src/runtime/sys_openbsd_arm.s

    	MOVW	R0, R8
    
    	MOVW	(0*4)(R8), R7 // fn
    	MOVW	(1*4)(R8), R0 // a1
    	MOVW	(2*4)(R8), R1 // a2
    	MOVW	(3*4)(R8), R2 // a3
    	MOVW	(4*4)(R8), R3 // a4
    	MOVW	(5*4)(R8), R4 // a5
    	MOVW	R4, 0(R13)
    	MOVW	(6*4)(R8), R5 // a6
    	MOVW	R5, 4(R13)
    	MOVW	(7*4)(R8), R6 // a7
    	MOVW	R6, 8(R13)
    	MOVW	(8*4)(R8), R4 // a8
    	MOVW	R4, 12(R13)
    	MOVW	(9*4)(R8), R5 // a9
    	MOVW	R5, 16(R13)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Jun 06 18:49:01 UTC 2023
    - 18.5K bytes
    - Viewed (0)
  9. src/cmd/internal/notsha256/sha256block_amd64.s

    	SHA256ROUND0(3, 0xe9b5dba5, R13, R14, R15, R8, R9, R10, R11, R12)
    	SHA256ROUND0(4, 0x3956c25b, R12, R13, R14, R15, R8, R9, R10, R11)
    	SHA256ROUND0(5, 0x59f111f1, R11, R12, R13, R14, R15, R8, R9, R10)
    	SHA256ROUND0(6, 0x923f82a4, R10, R11, R12, R13, R14, R15, R8, R9)
    	SHA256ROUND0(7, 0xab1c5ed5, R9, R10, R11, R12, R13, R14, R15, R8)
    	SHA256ROUND0(8, 0xd807aa98, R8, R9, R10, R11, R12, R13, R14, R15)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14K bytes
    - Viewed (0)
  10. src/crypto/internal/edwards25519/field/fe_amd64.s

    	MOVQ (CX), AX
    	MULQ 8(BX)
    	MOVQ AX, R9
    	MOVQ DX, R8
    
    	// r1 += a1×b0
    	MOVQ 8(CX), AX
    	MULQ (BX)
    	ADDQ AX, R9
    	ADCQ DX, R8
    
    	// r1 += 19×a2×b4
    	MOVQ   16(CX), AX
    	IMUL3Q $0x13, AX, AX
    	MULQ   32(BX)
    	ADDQ   AX, R9
    	ADCQ   DX, R8
    
    	// r1 += 19×a3×b3
    	MOVQ   24(CX), AX
    	IMUL3Q $0x13, AX, AX
    	MULQ   24(BX)
    	ADDQ   AX, R9
    	ADCQ   DX, R8
    
    	// r1 += 19×a4×b2
    	MOVQ   32(CX), AX
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 5.7K bytes
    - Viewed (0)
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