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Results 1 - 10 of 39 for operands (0.11 sec)

  1. src/cmd/asm/internal/asm/parse.go

    	}
    	word, cond = p.lex.Text(), ""
    	operands = scratch[:0]
    	// Zero or more comma-separated operands, one per loop.
    	nesting := 0
    	colon := -1
    	for tok != '\n' && tok != ';' {
    		// Process one operand.
    		var items []lex.Token
    		if cap(operands) > len(operands) {
    			// Reuse scratch items slice.
    			items = operands[:cap(operands)][len(operands)][:0]
    		} else {
    			items = make([]lex.Token, 0, 3)
    		}
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 04 18:16:59 UTC 2024
    - 36.9K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/pseudo_test.go

    	}
    	return res
    }
    
    func TestErroneous(t *testing.T) {
    
    	type errtest struct {
    		pseudo   string
    		operands string
    		expected string
    	}
    
    	nonRuntimeTests := []errtest{
    		{"TEXT", "", "expect two or three operands for TEXT"},
    		{"TEXT", "%", "expect two or three operands for TEXT"},
    		{"TEXT", "1, 1", "TEXT symbol \"<erroneous symbol>\" must be a symbol(SB)"},
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 3.1K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/asm.go

    // GLOBL shifts<>(SB),$256
    func (p *Parser) asmGlobl(operands [][]lex.Token) {
    	if len(operands) != 2 && len(operands) != 3 {
    		p.errorf("expect two or three operands for GLOBL")
    		return
    	}
    
    	// Operand 0 has the general form foo<>+0x04(SB).
    	nameAddr := p.address(operands[0])
    	if !p.validSymbol("GLOBL", &nameAddr, false) {
    		return
    	}
    	next := 1
    
    	// Next operand is the optional flag, a literal integer.
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/amd64error.s

    	CALL (AX)(PC*1)                 // ERROR "invalid instruction"
    	CALL (AX)(SB*1)                 // ERROR "invalid instruction"
    	CALL (AX)(FP*1)                 // ERROR "invalid instruction"
    	// Forbid memory operands for MOV CR/DR. See #24981.
    	MOVQ CR0, (AX)                  // ERROR "invalid instruction"
    	MOVQ CR2, (AX)                  // ERROR "invalid instruction"
    	MOVQ CR3, (AX)                  // ERROR "invalid instruction"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Jun 14 00:03:57 UTC 2023
    - 8.9K bytes
    - Viewed (0)
  5. doc/go1.17_spec.html

    
    <h2 id="Expressions">Expressions</h2>
    
    <p>
    An expression specifies the computation of a value by applying
    operators and functions to operands.
    </p>
    
    <h3 id="Operands">Operands</h3>
    
    <p>
    Operands denote the elementary values in an expression. An operand may be a
    literal, a (possibly <a href="#Qualified_identifiers">qualified</a>)
    non-<a href="#Blank_identifier">blank</a> identifier denoting a
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 10 18:25:45 UTC 2024
    - 211.6K bytes
    - Viewed (0)
  6. doc/go_spec.html

    </pre>
    
    <h2 id="Expressions">Expressions</h2>
    
    <p>
    An expression specifies the computation of a value by applying
    operators and functions to operands.
    </p>
    
    <h3 id="Operands">Operands</h3>
    
    <p>
    Operands denote the elementary values in an expression. An operand may be a
    literal, a (possibly <a href="#Qualified_identifiers">qualified</a>)
    non-<a href="#Blank_identifier">blank</a> identifier denoting a
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Oct 02 00:58:01 UTC 2024
    - 282.5K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VMOV	V8.D[0], V12.S[1]                                // ERROR "operand mismatch"
    	VMOV	V8.D[0], V12.H[1]                                // ERROR "operand mismatch"
    	VMOV	V8.D[0], V12.B[1]                                // ERROR "operand mismatch"
    	VMOV	V8.S[0], V12.H[1]                                // ERROR "operand mismatch"
    	VMOV	V8.S[0], V12.B[1]                                // ERROR "operand mismatch"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/arch/arch.go

    	// Pseudo-registers.
    	register["SB"] = RSB
    	register["FP"] = RFP
    	register["PC"] = RPC
    	register["SP"] = RSP
    	registerPrefix := map[string]bool{
    		"F": true,
    		"R": true,
    	}
    
    	// special operands for DMB/DSB instructions
    	register["MB_SY"] = arm.REG_MB_SY
    	register["MB_ST"] = arm.REG_MB_ST
    	register["MB_ISH"] = arm.REG_MB_ISH
    	register["MB_ISHST"] = arm.REG_MB_ISHST
    	register["MB_NSH"] = arm.REG_MB_NSH
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  9. src/main/webapp/js/admin/popper.min.js.map

    otherwise use width\n  // in this way the first offset will use an axis and the second one\n  // will use the other one\n  const useHeight = ['right', 'left'].indexOf(basePlacement) !== -1;\n\n  // Split the offset string to obtain a list of values and operands\n  // The regex addresses values with the plus or minus sign in front (+10, -20, etc)\n  const fragments = offset.split(/(\\+|\\-)/).map(frag => frag.trim());\n\n  // Detect if the offset string contains a pair of values or a single one\n  // they...
    Registered: Thu Oct 31 13:40:30 UTC 2024
    - Last Modified: Sat Oct 26 01:49:09 UTC 2024
    - 120.9K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

    	VMOVQ (AX), X20           // 62e1fd086e20 or 62e1fe087e20
    	VMOVQ 7(DX), X20          // 62e1fd086ea207000000 or 62e1fe087ea207000000
    	VMOVQ -15(R11)(CX*1), X20 // 62c1fd086ea40bf1ffffff or 62c1fe087ea40bf1ffffff
    	VMOVQ (SP)(AX*2), X20     // 62e1fd086e2444 or 62e1fe087e2444
    	// "VMOVQ xmm1, r/m64"/7E vs "VMOVQ xmm1, xmm2/m64"/D6 with mem operand.
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Apr 11 18:32:50 UTC 2023
    - 57.6K bytes
    - Viewed (0)
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