VREDXORVS	X10, V2, V3			// ERROR "expected vector register in vs1 position"
	VWREDSUMUVS	X10, V2, V3			// ERROR "expected vector register in vs1 position"
	VWREDSUMVS	X10, V2, V3			// ERROR "expected vector register in vs1 position"
	VFREDOSUMVS	X10, V2, V3			// ERROR "expected vector register in vs1 position"
	VFREDUSUMVS	X10, V2, V3			// ERROR "expected vector register in vs1 position"

	STXVB16X VS1, (R4)              // 7c2027d8
	STXVH8X VS1, (R4)(R5)           // 7c252758
	STXVH8X VS1, (R4)(R0)           // 7c202758
	STXVH8X VS1, (R4)               // 7c202758
	STXSDX VS1, (R3)(R4)            // 7c241d98
	STXSDX VS1, (R4)(R0)            // 7c202598
	STXSDX VS1, (R4)                // 7c202598
	LXSIWAX (R3)(R4), VS1           // 7c241898
	LXSIWAX (R3)(R0), VS1           // 7c201898

CR2, keysLoaded; \ ADD $64, R16; \ ADD $64, R17; \ LXVD2X (blk_key)(R16), VS13; \ LXVD2X (blk_key)(R17), VS14; \ CMP key_len, $14; \ BEQ keysLoaded; \ MOVD R0,0(R0); \ keysLoaded: // Encrypt 1 (vin) with first 9 // keys from VS1 - VS9. #define VCIPHER_1X9_KEYS(vin) \ XXLOR VS1, VS1, V23; \ XXLOR VS2, VS2, V24; \ XXLOR VS3, VS3, V25; \ XXLOR VS4, VS4, V26; \ XXLOR VS5, VS5, V27; \ VCIPHER vin, V23, vin; \ VCIPHER vin, V24, vin; \ VCIPHER vin, V25, vin; \ VCIPHER vin, V26, vin; \ VCIPHER vin, V27, vin;...