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Results 1 - 4 of 4 for UXTB (0.03 sec)
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doc/asm.html
<code>(R2)(R0)</code>: The location at <code>R0</code> plus <code>R2</code>. </li> <li> <code>R0.UXTB</code> <br> <code>R0.UXTB<<imm</code>: <code>UXTB</code>: extract an 8-bit value from the low-order bits of <code>R0</code> and zero-extend it to the size of <code>R0</code>. <code>R0.UXTB<<imm</code>: left shift the result of <code>R0.UXTB</code> by <code>imm</code> bits. The <code>imm</code> value can be 0, 1, 2, 3, or 4.
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Tue Nov 28 19:15:27 UTC 2023 - 36.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Mon Jul 24 01:11:41 UTC 2023 - 43.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64error.s
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Fri Dec 08 03:28:17 UTC 2023 - 37.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
ADD $0x3fffffffc000, R5 // ADD $70368744161280, R5 // fb7f72b2a5001b8b ADD R1>>11, R2, R3 ADD R1<<22, R2, R3 ADD R1->33, R2, R3 AND R1@>33, R2, R3 ADD R1.UXTB, R2, R3 // 4300218b ADD R1.UXTB<<4, R2, R3 // 4310218b ADD R2, RSP, RSP // ff63228b ADD R2.SXTX<<1, RSP, RSP // ffe7228b ADD ZR.SXTX<<1, R2, R3 // 43e43f8b
Registered: Tue Nov 05 11:13:11 UTC 2024 - Last Modified: Wed Jul 24 18:45:14 UTC 2024 - 95.2K bytes - Viewed (0)