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Results 1 - 6 of 6 for R30 (0.04 seconds)
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src/cmd/asm/internal/asm/testdata/arm64enc.s
CCMNW EQ, R20, R6, $6 // 8602463a CCMN LE, R30, R12, $6 // c6d34cba CCMPW VS, R29, $15, $7 // a76b4f7a CCMP LE, R7, $19, $3 // e3d853fa CCMPW HS, R19, R6, $0 // 6022467a CCMP LT, R30, R6, $7 // c7b346fa CCMN MI, ZR, R1, $4 // e44341ba
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 24 21:29:25 GMT 2026 - 44K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Feb 27 20:41:17 GMT 2026 - 96.2K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
register["FPSCR"] = ppc64.REG_FPSCR register["MSR"] = ppc64.REG_MSR // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC // Avoid unintentionally clobbering g using R30. delete(register, "R30") register["g"] = ppc64.REG_R30 registerPrefix := map[string]bool{ "CR": true, "F": true, "R": true, "SPR": true, } instructions := make(map[string]obj.As)
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 22K bytes - Click Count (0) -
doc/asm.html
To prevent accidental misuse, the register is named <code>R18_PLATFORM</code>. <code>R27</code> and <code>R28</code> are reserved by the compiler and linker. <code>R29</code> is the frame pointer. <code>R30</code> is the link register. </p> <p> Instruction modifiers are appended to the instruction following a period. The only modifiers are <code>P</code> (postincrement) and <code>W</code> (preincrement):
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Nov 14 19:09:46 GMT 2025 - 36.5K bytes - Click Count (0) -
lib/fips140/v1.26.0.zip
BIGSIGMA0(a) + Maj(a,b,c) // h = g // g = f // f = e // e = d + T1 // d = c // c = b // b = a // a = T1 + T2 // } // // H0 = a + H0 // H1 = b + H1 // H2 = c + H2 // H3 = d + H3 // H4 = e + H4 // H5 = f + H5 // H6 = g + H6 // H7 = h + H7 #define REGTMP R30 #define REGTMP1 R16 #define REGTMP2 R17 #define REGTMP3 R18 #define REGTMP4 R7 #define REGTMP5 R6 #define REG_KT R19 // W[i] = M[i]; for 0 <= i <= 15 #define LOAD0(index) \ MOVW (index*4)(R5), REGTMP4; \ REVB2W REGTMP4, REGTMP4; \ MOVW REGTMP4, (index*4)(R3)...
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Jan 08 17:58:32 GMT 2026 - 660.3K bytes - Click Count (0) -
lib/fips140/v1.0.0-c2097c7c.zip
BIGSIGMA0(a) + Maj(a,b,c) // h = g // g = f // f = e // e = d + T1 // d = c // c = b // b = a // a = T1 + T2 // } // // H0 = a + H0 // H1 = b + H1 // H2 = c + H2 // H3 = d + H3 // H4 = e + H4 // H5 = f + H5 // H6 = g + H6 // H7 = h + H7 #define REGTMP R30 #define REGTMP1 R16 #define REGTMP2 R17 #define REGTMP3 R18 #define REGTMP4 R7 #define REGTMP5 R6 // W[i] = M[i]; for 0 <= i <= 15 #define LOAD0(index) \ MOVW (index*4)(R5), REGTMP4; \ WORD $0x38e7; \ // REVB2W REGTMP4, REGTMP4 to big-endian MOVW REGTMP4,...
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Thu Sep 25 19:53:19 GMT 2025 - 642.7K bytes - Click Count (0)