MSR	R14, PMEVCNTR29_EL0                // aeeb1bd5
	MSR	R23, PMEVCNTR30_EL0                // d7eb1bd5
	MRS	PMEVTYPER0_EL0, R23                // 17ec3bd5
	MRS	PMEVTYPER1_EL0, R30                // 3eec3bd5
	MRS	PMEVTYPER2_EL0, R12                // 4cec3bd5
	MRS	PMEVTYPER3_EL0, R13                // 6dec3bd5
	MRS	PMEVTYPER4_EL0, R25                // 99ec3bd5
	MRS	PMEVTYPER5_EL0, R23                // b7ec3bd5

General purpose registers are named <code>R0</code> through <code>R31</code>,
floating point registers are <code>F0</code> through <code>F31</code>.
</p>

<p>
<code>R30</code> is reserved to point to <code>g</code>.
<code>R23</code> is used as a temporary register.
</p>

<p>
In a <code>TEXT</code> directive, the frame size <code>$-4</code> for MIPS or
<code>$-8</code> for MIPS64 instructs the linker not to save <code>LR</code>.
</p>

acc5 R8 #define acc6 R9 #define acc7 R10 #define t0 R11 #define t1 R12 #define t2 R13 #define t3 R14 #define const0 R15 #define const1 R16 #define hlp0 R17 #define hlp1 res_ptr #define x0 R19 #define x1 R20 #define x2 R21 #define x3 R22 #define y0 R23 #define y1 R24 #define y2 R25 #define y3 R26 #define const2 t2 #define const3 t3 DATA p256const0<>+0x00(SB)/8, $0x00000000ffffffff DATA p256const1<>+0x00(SB)/8, $0xffffffff00000001 DATA p256ordK0<>+0x00(SB)/8, $0xccd1c8aaee00bc4f DATA p256ord<>+0x00(SB)/8,...