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Results 1 - 10 of 17 for lxvrhx (0.11 sec)

  1. src/cmd/internal/obj/ppc64/anames.go

    	"VSBOX",
    	"VSHASIGMA",
    	"VSHASIGMAW",
    	"VSHASIGMAD",
    	"VMRGEW",
    	"VMRGOW",
    	"VCLZLSBB",
    	"VCTZLSBB",
    	"LXV",
    	"LXVL",
    	"LXVLL",
    	"LXVD2X",
    	"LXVW4X",
    	"LXVH8X",
    	"LXVB16X",
    	"LXVX",
    	"LXVDSX",
    	"STXV",
    	"STXVL",
    	"STXVLL",
    	"STXVD2X",
    	"STXVW4X",
    	"STXVH8X",
    	"STXVB16X",
    	"STXVX",
    	"LXSDX",
    	"STXSDX",
    	"LXSIWAX",
    	"LXSIWZX",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Apr 01 18:50:29 UTC 2024
    - 6.7K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/ppc64.s

    	VSHASIGMAD $2, $15, V1, V2      // 104196c2
    
    	LXVD2X (R3)(R4), VS1            // 7c241e98
    	LXVD2X (R3)(R0), VS1            // 7c201e98
    	LXVD2X (R3), VS1                // 7c201e98
    	LXVDSX (R3)(R4), VS1            // 7c241a98
    	LXVDSX (R3)(R0), VS1            // 7c201a98
    	LXVDSX (R3), VS1                // 7c201a98
    	LXVH8X (R3)(R4), VS1            // 7c241e58
    	LXVH8X (R3)(R0), VS1            // 7c201e58
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 21:53:50 UTC 2024
    - 50.2K bytes
    - Viewed (0)
  3. src/crypto/internal/nistec/p256_asm_ppc64le.s

    	// cond is R1 + 24 (cond offset) + 32
    	LXVDSX (R1)(R21), SEL
    	VSPLTISB $0, ZER
    	// SEL controls whether to store a or b
    	VCMPEQUD SEL, ZER, SEL
    
    	LXVD2X (P1ptr+R0), X1H
    	LXVD2X (P1ptr+R16), X1L
    	LXVD2X (P1ptr+R17), Y1H
    	LXVD2X (P1ptr+R18), Y1L
    	LXVD2X (P1ptr+R19), Z1H
    	LXVD2X (P1ptr+R20), Z1L
    
    	LXVD2X (P2ptr+R0), X2H
    	LXVD2X (P2ptr+R16), X2L
    	LXVD2X (P2ptr+R17), Y2H
    	LXVD2X (P2ptr+R18), Y2L
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 56.5K bytes
    - Viewed (0)
  4. src/crypto/sha256/sha256block_ppc64x.s

    	MOVD	$·kcon(SB), TBL_STRT
    	MOVD	$0x10, R_x010
    
    #ifdef GOARCH_ppc64le
    	MOVWZ	$8, TEMP
    	LVSL	(TEMP)(R0), LEMASK
    	VSPLTISB	$0x0F, KI
    	VXOR	KI, LEMASK, LEMASK
    #endif
    
    	LXVW4X	(CTX)(R_x000), V0
    	LXVW4X	(CTX)(R_x010), V4
    
    	// unpack the input values into vector registers
    	VSLDOI	$4, V0, V0, V1
    	VSLDOI	$8, V0, V0, V2
    	VSLDOI	$12, V0, V0, V3
    	VSLDOI	$4, V4, V4, V5
    	VSLDOI	$8, V4, V4, V6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 14.4K bytes
    - Viewed (0)
  5. src/cmd/internal/notsha256/sha256block_ppc64x.s

    	MOVD	$·kcon(SB), TBL_STRT
    	MOVD	$0x10, R_x010
    
    #ifdef GOARCH_ppc64le
    	MOVWZ	$8, TEMP
    	LVSL	(TEMP)(R0), LEMASK
    	VSPLTISB	$0x0F, KI
    	VXOR	KI, LEMASK, LEMASK
    #endif
    
    	LXVW4X	(CTX)(R_x000), V0
    	LXVW4X	(CTX)(R_x010), V4
    
    	// unpack the input values into vector registers
    	VSLDOI	$4, V0, V0, V1
    	VSLDOI	$8, V0, V0, V2
    	VSLDOI	$12, V0, V0, V3
    	VSLDOI	$4, V4, V4, V5
    	VSLDOI	$8, V4, V4, V6
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 14.5K bytes
    - Viewed (0)
  6. src/internal/bytealg/compare_ppc64x.s

    	LXVD2X	(R5)(R9),V3
    	LXVD2X	(R6)(R9),V4
    	VCMPEQUDCC	V3,V4,V1
    	BGE	CR6,different
    
    	RET
    
    	PCALIGN $16
    cmp32:	// 32 - 63B
    	ANDCC	$31,R9,R9
    
    	LXVD2X	(R0)(R5),V3
    	LXVD2X	(R0)(R6),V4
    	VCMPEQUDCC	V3,V4,V1
    	BGE	CR6,different
    
    	LXVD2X	(R10)(R5),V3
    	LXVD2X	(R10)(R6),V4
    	VCMPEQUDCC	V3,V4,V1
    	BGE	CR6,different
    
    	BC	$12,2,LR	// beqlr
    	ADD	R9,R10,R10
    
    	LXVD2X	(R9)(R5),V3
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Aug 28 17:33:20 UTC 2023
    - 6.7K bytes
    - Viewed (0)
  7. src/vendor/golang.org/x/crypto/chacha20/chacha_ppc64le.s

    	MOVD $16, R20
    	// V16
    	LXVW4X (CONSTBASE)(R0), VS48
    	ADD $80,CONSTBASE
    
    	// Load key into V17,V18
    	LXVW4X (KEY)(R0), VS49
    	LXVW4X (KEY)(R8), VS50
    
    	// Load CNT, NONCE into V19
    	LXVW4X (CNT)(R0), VS51
    
    	// Clear V27
    	VXOR V27, V27, V27
    
    	// V28
    	LXVW4X (CONSTBASE)(R11), VS60
    
    	// Load mask constants for VPERMXOR
    	LXVW4X (MASK)(R0), V20
    	LXVW4X (MASK)(R20), V21
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 05 22:18:42 UTC 2024
    - 9K bytes
    - Viewed (0)
  8. src/crypto/subtle/xor_ppc64x.s

    	// Load 4 vectors of a and b
    	// XOR the corresponding vectors
    	// from a and b and store the result
    loop64:
    	LXVD2X	(R4)(R8), VS32
    	LXVD2X	(R4)(R10), VS34
    	LXVD2X	(R4)(R14), VS36
    	LXVD2X	(R4)(R15), VS38
    	LXVD2X	(R5)(R8), VS33
    	LXVD2X	(R5)(R10), VS35
    	LXVD2X	(R5)(R14), VS37
    	LXVD2X	(R5)(R15), VS39
    	XXLXOR	VS32, VS33, VS32
    	XXLXOR	VS34, VS35, VS34
    	XXLXOR	VS36, VS37, VS36
    	XXLXOR	VS38, VS39, VS38
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 2.9K bytes
    - Viewed (0)
  9. test/codegen/copy.go

    func moveDisjointStack32() {
    	var s [32]byte
    	// ppc64x:-".*memmove"
    	// ppc64x/power8:"LXVD2X",-"ADD",-"BC"
    	// ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC"
    	copy(s[:], x[:32])
    	runtime.KeepAlive(&s)
    }
    
    func moveDisjointStack64() {
    	var s [96]byte
    	// ppc64x:-".*memmove"
    	// ppc64x/power8:"LXVD2X","ADD","BC"
    	// ppc64x/power9:"LXV",-"LXVD2X",-"ADD",-"BC"
    	copy(s[:], x[:96])
    	runtime.KeepAlive(&s)
    }
    
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Sep 22 14:09:29 UTC 2023
    - 3.1K bytes
    - Viewed (0)
  10. src/crypto/aes/asm_ppc64x.s

    	MOVD	$128, R20 \
    	MOVD	$144, R21 \
    	LXVD2X	(R0+Rkeyp), V6 \
    	ADD	$16, Rkeyp \
    	BEQ	CR1, L_start10 \
    	BEQ	CR2, L_start12 \
    	LXVD2X	(R0+Rkeyp), V7 \
    	LXVD2X	(R12+Rkeyp), V8 \
    	ADD	$32, Rkeyp \
    	L_start12: \
    	LXVD2X	(R0+Rkeyp), V9 \
    	LXVD2X	(R12+Rkeyp), V10 \
    	ADD	$32, Rkeyp \
    	L_start10: \
    	LXVD2X	(R0+Rkeyp), V11 \
    	LXVD2X	(R12+Rkeyp), V12 \
    	LXVD2X	(R14+Rkeyp), V13 \
    	LXVD2X	(R15+Rkeyp), V14 \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon May 20 18:05:32 UTC 2024
    - 18.6K bytes
    - Viewed (0)
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