func (c *sigctxt) link() uint64   { return c.regs().lr }
func (c *sigctxt) xer() uint32    { return c.regs().xer }
func (c *sigctxt) ccr() uint32    { return c.regs().cr }
func (c *sigctxt) fpscr() uint32  { return c.regs().fpscr }
func (c *sigctxt) fpscrx() uint32 { return c.regs().fpscrx }

// TODO(aix): find trap equivalent
func (c *sigctxt) trap() uint32 { return 0x0 }

func (c *sigctxt) sigcode() uint32 { return uint32(c.info.si_code) }

	for i := 0; i <= 31; i++ {
		reg := fmt.Sprintf("F%d", i)
		l.add("FMOVD", reg, 8)
	}
	// Add floating point control/status register FPSCR.
	l.addSpecial(
		"MOVFL FPSCR, F0\nFMOVD F0, %d(R1)",
		"FMOVD %d(R1), F0\nMOVFL F0, FPSCR",
		8)

	p("MOVD R31, -%d(R1)", l.stack-32) // save R31 first, we'll use R31 for saving LR
	p("MOVD LR, R31")

	"U16CON",
	"16CON",
	"U31CON",
	"S32CON",
	"U32CON",
	"32CON",
	"S34CON",
	"64CON",
	"SACON",
	"LACON",
	"DACON",
	"BRA",
	"BRAPIC",
	"ZOREG",
	"SOREG",
	"LOREG",
	"XOREG",
	"FPSCR",
	"LR",
	"CTR",
	"ANY",
	"GOK",
	"ADDR",
	"TLS_LE",
	"TLS_IE",
	"TEXTSIZE",
	"NCLASS",

	pc    uint64     // program counter
	cpsr  uint32     // current program status register
	__pad uint32
}

type neonstate64 struct {
	v    [64]uint64 // actually [32]uint128
	fpsr uint32
	fpcr uint32
}

type mcontext64 struct {
	es exceptionstate64
	ss regs64
	ns neonstate64
}

type ucontext struct {
	uc_onstack  int32
	uc_sigmask  uint32
	uc_stack    stackt

type context struct {
	contextflags uint32
	cpsr         uint32
	x            [31]uint64 // fp is x[29], lr is x[30]
	xsp          uint64
	pc           uint64
	v            [32]neon128
	fpcr         uint32
	fpsr         uint32
	bcr          [8]uint32
	bvr          [8]uint64
	wcr          [2]uint32
	wvr          [2]uint64
}

func (c *context) ip() uintptr { return uintptr(c.pc) }

	r7           uint32
	r8           uint32
	r9           uint32
	r10          uint32
	r11          uint32
	r12          uint32

	spr  uint32
	lrr  uint32
	pc   uint32
	cpsr uint32

	fpscr   uint32
	padding uint32

	floatNeon [16]neon128

	bvr      [8]uint32
	bcr      [8]uint32
	wvr      [1]uint32
	wcr      [1]uint32
	padding2 [2]uint32
}

	//	}
	MOVD	F1, foo<>+3(SB)
	MOVD	F1, 16(R2)
	MOVD	F1, (R2)

	//
	// floating point status
	//
	//	LMOVW fpscr ',' freg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	FCR0, R1

	//	LMOVW freg ','  fpscr
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}
	MOVW	R1, FCR0

	//	LMOVW rreg ',' mreg
	//	{
	//		outcode(int($1), &$2, 0, &$4);
	//	}

//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVD	F1, foo<>+3(SB)
	MOVD	F1, 16(R2)
	MOVD	F1, (R2)

//
// floating point status
//
//	LMOVW fpscr ',' freg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVW	FCR31, R1 // 4441f800

//	LMOVW freg ','  fpscr
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVW	R1, FCR31 // 44c1f800

//	LMOVW rreg ',' mreg
//	{
//		outcode(int($1), &$2, 0, &$4);

	MOVW R6, 28(R13)
	MOVW R7, 32(R13)
	MOVW R8, 36(R13)
	MOVW R9, 40(R13)
	MOVW R11, 44(R13)
	MOVW R12, 48(R13)
	MOVW CPSR, R0
	MOVW R0, 52(R13)
	MOVB ·goarmsoftfp(SB), R0
	CMP $0, R0
	BNE nofp
	MOVW FPCR, R0
	MOVW R0, 56(R13)
	MOVD F0, 60(R13)
	MOVD F1, 68(R13)
	MOVD F2, 76(R13)
	MOVD F3, 84(R13)
	MOVD F4, 92(R13)
	MOVD F5, 100(R13)
	MOVD F6, 108(R13)
	MOVD F7, 116(R13)
	MOVD F8, 124(R13)

	gp_x    [30]uint64
	gp_lr   uint64
	gp_sp   uint64
	gp_elr  uint64
	gp_spsr uint32
	gp_pad  int32
}

type fpregs struct {
	fp_q     [64]uint64 // actually [32]uint128
	fp_sr    uint32
	fp_cr    uint32
	fp_flags int32
	fp_pad   int32
}

type mcontext struct {
	mc_gpregs gpregs
	mc_fpregs fpregs
	mc_flags  int32
	mc_pad    int32
	mc_spare  [8]uint64
}