register["FPSCR"] = ppc64.REG_FPSCR
	register["MSR"] = ppc64.REG_MSR
	// Pseudo-registers.
	register["SB"] = RSB
	register["FP"] = RFP
	register["PC"] = RPC
	// Avoid unintentionally clobbering g using R30.
	delete(register, "R30")
	register["g"] = ppc64.REG_R30
	registerPrefix := map[string]bool{
		"CR":  true,
		"F":   true,
		"R":   true,
		"SPR": true,
	}

	instructions := make(map[string]obj.As)

	VST1.P	[V4.S4, V5.S4], 32(R1)                          // 24a89f4c
	VST1	[V0.S4, V1.S4], (R0)                            // 00a8004c
	VLD1	(R30), [V15.S2, V16.S2]                         // cfab400c
	VLD1.P	24(R30), [V3.S2,V4.S2,V5.S2]                    // c36bdf0c
	VLD2	(R29), [V23.H8, V24.H8]                         // b787404c
	VLD2.P	16(R0), [V18.B8, V19.B8]                        // 1280df0c

BIGSIGMA0(a) + Maj(a,b,c) // h = g // g = f // f = e // e = d + T1 // d = c // c = b // b = a // a = T1 + T2 // } // // H0 = a + H0 // H1 = b + H1 // H2 = c + H2 // H3 = d + H3 // H4 = e + H4 // H5 = f + H5 // H6 = g + H6 // H7 = h + H7 #define REGTMP R30 #define REGTMP1 R16 #define REGTMP2 R17 #define REGTMP3 R18 #define REGTMP4 R7 #define REGTMP5 R6 // W[i] = M[i]; for 0 <= i <= 15 #define LOAD0(index) \ MOVW (index*4)(R5), REGTMP4; \ WORD $0x38e7; \ // REVB2W REGTMP4, REGTMP4 to big-endian MOVW REGTMP4,...