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Results 1 - 5 of 5 for MOVBLZX (0.46 sec)

  1. src/cmd/asm/internal/lex/lex_test.go

    			"\tPINSRW	$index, (BP)(R8*4), xmm",
    			"#define LOAD(off, reg) \\",
    			"\tMOVBLZX	(off*4)(R12),	reg \\",
    			"\tADDB	reg,		DX",
    			"KEYROUND(X0, LOAD, 8, AX, BX, 0)",
    		),
    		"\n.MOVBLZX.(.BP.).(.DX.*.4.).,.R8.\n.\n.MOVBLZX.(.(.8.+.1.).*.4.).(.R12.).,.BX.\n.ADDB.BX.,.DX.\n.MOVB.R8.,.(.8.*.4.).(.R12.).\n.PINSRW.$.0.,.(.BP.).(.R8.*.4.).,.X0.\n",
    	},
    	{
    		"taken #ifdef",
    		lines(
    			"#define A",
    			"#ifdef A",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 29 07:48:38 UTC 2023
    - 5.8K bytes
    - Viewed (0)
  2. test/codegen/memops.go

    	// amd64: `ORQ\t[$]77, 64\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+8] |= 77
    	// amd64: `XORQ\t[$]77, 72\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*8\)`
    	x[i+9] ^= 77
    }
    
    func idxCompare(i int) int {
    	// amd64: `MOVBLZX\t1\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*1\), [A-Z]+[0-9]*`
    	if x8[i+1] < x8[0] {
    		return 0
    	}
    	// amd64: `MOVWLZX\t2\([A-Z]+[0-9]*\)\([A-Z]+[0-9]*\*2\), [A-Z]+[0-9]*`
    	if x16[i+1] < x16[0] {
    		return 0
    	}
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 12.5K bytes
    - Viewed (0)
  3. src/runtime/race_amd64.s

    // Generic atomic operation implementation.
    // AX already contains target function.
    TEXT	racecallatomic<>(SB), NOSPLIT|NOFRAME, $0-0
    	// Trigger SIGSEGV early.
    	MOVQ	16(SP), R12
    	MOVBLZX	(R12), R13
    	// Check that addr is within [arenastart, arenaend) or within [racedatastart, racedataend).
    	CMPQ	R12, runtime·racearenastart(SB)
    	JB	racecallatomic_data
    	CMPQ	R12, runtime·racearenaend(SB)
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri May 17 18:37:29 UTC 2024
    - 15.1K bytes
    - Viewed (0)
  4. src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

    		{name: "MOVBQSX", argLength: 1, reg: gp11, asm: "MOVBQSX"}, // sign extend arg0 from int8 to int64
    		{name: "MOVBQZX", argLength: 1, reg: gp11, asm: "MOVBLZX"}, // zero extend arg0 from int8 to int64
    		{name: "MOVWQSX", argLength: 1, reg: gp11, asm: "MOVWQSX"}, // sign extend arg0 from int16 to int64
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Aug 04 16:40:24 UTC 2023
    - 98K bytes
    - Viewed (1)
  5. src/cmd/compile/internal/ssa/opGen.go

    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    		},
    	},
    	{
    		name:   "MOVBLZX",
    		argLen: 1,
    		asm:    x86.AMOVBLZX,
    		reg: regInfo{
    			inputs: []inputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    			},
    			outputs: []outputInfo{
    				{0, 239}, // AX CX DX BX BP SI DI
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 1M bytes
    - Viewed (0)
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