"FCMPO",
	"FCMPU",
	"CEBR",
	"FDIV",
	"FDIVS",
	"FMADD",
	"FMADDS",
	"FMOVD",
	"FMOVS",
	"FMSUB",
	"FMSUBS",
	"FMUL",
	"FMULS",
	"FNABS",
	"FNEG",
	"FNEGS",
	"LEDBR",
	"LDEBR",
	"LPDFR",
	"LNDFR",
	"FSUB",
	"FSUBS",
	"FSQRT",
	"FSQRTS",
	"FIEBR",
	"FIDBR",
	"CPSDR",
	"LTEBR",
	"LTDBR",
	"TCEB",
	"TCDB",
	"LDGR",
	"LGDR",
	"CEFBRA",

	// s390x:"LNDFR\t",-"MOVD\t"     (no integer load/store)
	// ppc64x:"FNABS\t"
	sink64[1] = -math.Abs(y)
}

// Check that it's using integer registers
func abs32(x float32) float32 {
	// s390x:"LPDFR",-"LDEBR",-"LEDBR"     (no float64 conversion)
	return float32(math.Abs(float64(x)))
}

// Check that it's using integer registers
func copysign(a, b, c float64) {
	// amd64:"BTRQ\t[$]63","ANDQ","ORQ"

(FNEG  (LNDFR x)) => (LPDFR x)
(FNEGS (LPDFR x)) => (LNDFR x)
(FNEGS (LNDFR x)) => (LPDFR x)

// no need to convert float32 to float64 to set/clear sign bit
(LEDBR (LPDFR (LDEBR x))) => (LPDFR x)
(LEDBR (LNDFR (LDEBR x))) => (LNDFR x)

// remove unnecessary FPR <-> GPR moves
(LDGR (LGDR x)) => x
(LGDR (LDGR x)) => x

// Don't extend before storing

	v_0 := v.Args[0]
	// match: (LEDBR (LPDFR (LDEBR x)))
	// result: (LPDFR x)
	for {
		if v_0.Op != OpS390XLPDFR {
			break
		}
		v_0_0 := v_0.Args[0]
		if v_0_0.Op != OpS390XLDEBR {
			break
		}
		x := v_0_0.Args[0]
		v.reset(OpS390XLPDFR)
		v.AddArg(x)
		return true
	}
	// match: (LEDBR (LNDFR (LDEBR x)))
	// result: (LNDFR x)
	for {

			},
			outputs: []outputInfo{
				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
			},
		},
	},
	{
		name:   "LDEBR",
		argLen: 1,
		asm:    s390x.ALDEBR,
		reg: regInfo{
			inputs: []inputInfo{
				{0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
			},
			outputs: []outputInfo{