pc    uint64     // program counter
	cpsr  uint32     // current program status register
	__pad uint32
}

type neonstate64 struct {
	v    [64]uint64 // actually [32]uint128
	fpsr uint32
	fpcr uint32
}

type mcontext64 struct {
	es exceptionstate64
	ss regs64
	ns neonstate64
}

type ucontext struct {
	uc_onstack  int32
	uc_sigmask  uint32
	uc_stack    stackt

type context struct {
	contextflags uint32
	cpsr         uint32
	x            [31]uint64 // fp is x[29], lr is x[30]
	xsp          uint64
	pc           uint64
	v            [32]neon128
	fpcr         uint32
	fpsr         uint32
	bcr          [8]uint32
	bvr          [8]uint64
	wcr          [2]uint32
	wvr          [2]uint64
}

func (c *context) ip() uintptr { return uintptr(c.pc) }

}

type Sigset_t struct {
	Val [4]uint32
}

type Reg struct {
	R    [13]uint32
	Sp   uint32
	Lr   uint32
	Pc   uint32
	Cpsr uint32
}

type FpReg struct {
	Fpsr uint32
	Fpr  [8]FpExtendedPrecision
}

type FpExtendedPrecision struct {
	Exponent    uint32
	Mantissa_hi uint32
	Mantissa_lo uint32
}

type PtraceIoDesc struct {
	Op   int32

		l.add2("STP", "LDP", reg, 16)
	}
	// Add flag registers.
	l.addSpecial(
		"MOVD NZCV, R0\nMOVD R0, %d(RSP)",
		"MOVD %d(RSP), R0\nMOVD R0, NZCV",
		8)
	l.addSpecial(
		"MOVD FPSR, R0\nMOVD R0, %d(RSP)",
		"MOVD %d(RSP), R0\nMOVD R0, FPSR",
		8)
	// TODO: FPCR? I don't think we'll change it, so no need to save.
	// Add floating point registers F0-F31.
	for i := 0; i < 31; i += 2 {
		reg := fmt.Sprintf("(F%d, F%d)", i, i+1)

	MOVW	$0xff000000, CPSR    // MOVW $4278190080, CPSR    // fff42ce3
	MOVW	FPSR, R9                                          // 109af1ee
	MOVW	FPSR, g                                           // 10aaf1ee
	MOVW	R9, FPSR                                          // 109ae1ee
	MOVW	g, FPSR                                           // 10aae1ee
	MOVW	R0>>28(R1), R2                                    // 202e91e7

	MSR	R25, FAR_EL1                       // 196018d5
	MRS	FPCR, R1                           // 01443bd5
	MSR	R27, FPCR                          // 1b441bd5
	MRS	FPSR, R5                           // 25443bd5
	MSR	R15, FPSR                          // 2f441bd5
	MRS	ID_AA64AFR0_EL1, R19               // 930538d5
	MRS	ID_AA64AFR1_EL1, R24               // b80538d5
	MRS	ID_AA64DFR0_EL1, R21               // 150538d5