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Results 1 - 10 of 14 for F2 (0.39 sec)

  1. src/cmd/asm/internal/asm/testdata/ppc64.s

    	FSUBCC F1, F2, F3               // fc620829
    	FSUBS F1, F2                    // ec420828
    	FSUBS F1, F2, F3                // ec620828
    	FSUBCC F1, F2, F3               // fc620829
    	FSUBSCC F1, F2, F3              // ec620829
    	FMUL F1, F2                     // fc420072
    	FMUL F1, F2, F3                 // fc620072
    	FMULCC F1, F2, F3               // fc620073
    	FMULS F1, F2                    // ec420072
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Wed Apr 24 15:53:25 GMT 2024
    - 49K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/mips.s

    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    	MOVF	foo<>+3(SB), F2
    	MOVF	16(R1), F2
    	MOVF	(R1), F2
    
    	//	LFMOV fimm ',' freg
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    	MOVF	$0.1, F2	// MOVF $(0.10000000000000001), F2
    
    	//	LFMOV freg ',' freg
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    	MOVF	F1, F2
    
    	//	LFMOV freg ',' addr
    	//	{
    	//		outcode(int($1), &$2, 0, &$4);
    	//	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 6.7K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/armerror.s

    	NEGF	F0, F1, F2         // ERROR "illegal combination"
    	NEGD	F0, F1, F2         // ERROR "illegal combination"
    	ABSF	F0, F1, F2         // ERROR "illegal combination"
    	ABSD	F0, F1, F2         // ERROR "illegal combination"
    	SQRTF	F0, F1, F2         // ERROR "illegal combination"
    	SQRTD	F0, F1, F2         // ERROR "illegal combination"
    	MOVF	F0, F1, F2         // ERROR "illegal combination"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Nov 03 14:06:21 GMT 2017
    - 14.4K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/riscv64.s

    	FCVTSLU	X5, F0					// 538032d0
    	FSGNJS	F1, F0, F2				// 53011020
    	FSGNJNS	F1, F0, F2				// 53111020
    	FSGNJXS	F1, F0, F2				// 53211020
    	FMVXS	F0, X5					// d30200e0
    	FMVSX	X5, F0					// 538002f0
    	FMVXW	F0, X5					// d30200e0
    	FMVWX	X5, F0					// 538002f0
    	FMADDS	F1, F2, F3, F4				// 43822018
    	FMSUBS	F1, F2, F3, F4				// 47822018
    	FNMSUBS	F1, F2, F3, F4				// 4b822018
    	FNMADDS	F1, F2, F3, F4				// 4f822018
    
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Mar 22 04:42:21 GMT 2024
    - 16.7K bytes
    - Viewed (1)
  5. src/cmd/asm/internal/asm/testdata/armv6.s

    TEXT	foo(SB), DUPOK|NOSPLIT, $0
    
    	ADDF	F0, F1, F2    // 002a31ee
    	ADDD.EQ	F3, F4, F5    // 035b340e
    	ADDF.NE	F0, F2        // 002a321e
    	ADDD	F3, F5        // 035b35ee
    	SUBF	F0, F1, F2    // 402a31ee
    	SUBD.EQ	F3, F4, F5    // 435b340e
    	SUBF.NE	F0, F2        // 402a321e
    	SUBD	F3, F5        // 435b35ee
    	MULF	F0, F1, F2    // 002a21ee
    	MULD.EQ	F3, F4, F5    // 035b240e
    	MULF.NE	F0, F2        // 002a221e
    	MULD	F3, F5        // 035b25ee
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Thu Dec 21 16:30:51 GMT 2017
    - 4.6K bytes
    - Viewed (0)
  6. src/cmd/asm/internal/asm/testdata/arm64.s

    	FLDPD	1024(RSP), (F1, F2) // fb031091610b406d
    	FLDPD.W	8(RSP), (F1, F2)    // e18bc06d
    	FLDPD.P	8(RSP), (F1, F2)    // e18bc06c
    	FLDPD	-31(R0), (F1, F2)   // 1b7c00d1610b406d
    	FLDPD	-4(R0), (F1, F2)    // 1b1000d1610b406d
    	FLDPD	-8(R0), (F1, F2)    // 01887f6d
    	FLDPD	x(SB), (F1, F2)
    	FLDPD	x+8(SB), (F1, F2)
    	FLDPS	-5(R0), (F1, F2)    // 1b1400d1610b402d
    	FLDPS	(R0), (F1, F2)      // 0108402d
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 94.9K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/testdata/mips64.s

    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVD	foo<>+3(SB), F2
    	MOVD	16(R1), F2
    	MOVD	(R1), F2
    
    //	LFMOV fimm ',' freg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVD	$0.1, F2 // MOVD $(0.10000000000000001), F2
    
    //	LFMOV freg ',' freg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVD	F1, F2
    
    //	LFMOV freg ',' addr
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Tue Aug 08 12:17:12 GMT 2023
    - 12.4K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	//TODO VFMOV R7, V25.D[1]                  // f900af9e
    	FMOVD F2, R15                              // 4f00669e
    	FMOVD R3, F11                              // 6b00679e
    	FMOVS F20, R29                             // 9d02261e
    	FMOVS R8, F15                              // 0f01271e
    	FMOVD F2, F9                               // 4940601e
    	FMOVS F4, F27                              // 9b40201e
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Mon Jul 24 01:11:41 GMT 2023
    - 43.9K bytes
    - Viewed (1)
  9. src/cmd/asm/internal/asm/testdata/riscv64error.s

    	MOVBU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVHU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
    	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
    	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
    	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
    	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Sun Apr 07 03:32:27 GMT 2024
    - 2.8K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/testdata/arm64error.s

    	FLDPQ	(R1), (F2, F2)                                   // ERROR "constrained unpredictable behavior"
    	FSTPQ	(R1, R2), (R0)                                   // ERROR "invalid register pair"
    	FLDPD	(R0), (R1, R2)                                   // ERROR "invalid register pair"
    	FLDPD	(R1), (F2, F2)                                   // ERROR "constrained unpredictable behavior"
    Others
    - Registered: Tue Apr 30 11:13:12 GMT 2024
    - Last Modified: Fri Dec 08 03:28:17 GMT 2023
    - 37.8K bytes
    - Viewed (0)
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