#ifdef GOARCH_ppc64le
#define VPERMLE(va,vb,vc,vt) VPERM va, vb, vc, vt
#else
#define VPERMLE(va,vb,vc,vt)
#endif

// 2 copies of each Kt, to fill both doublewords of a vector register
DATA  ·kcon+0x000(SB)/8, $0x428a2f98d728ae22
DATA  ·kcon+0x008(SB)/8, $0x428a2f98d728ae22
DATA  ·kcon+0x010(SB)/8, $0x7137449123ef65cd
DATA  ·kcon+0x018(SB)/8, $0x7137449123ef65cd

	MOVQ	R9, 24(SP)
	CALL	runtime·sehhandler(SB)
	MOVL	32(SP), AX

	ADJSP	$-40

	POP_REGS_HOST_TO_ABI0()
	RET

TEXT runtime·callbackasm1(SB),NOSPLIT|NOFRAME,$0
	// Construct args vector for cgocallback().
	// By windows/amd64 calling convention first 4 args are in CX, DX, R8, R9
	// args from the 5th on are on the stack.
	// In any case, even if function has 0,1,2,3,4 args, there is reserved

// equivalent function from the corresponding s390x
// instruction for vector multiply high, low, and add,
// since there aren't exact equivalent instructions.
// The corresponding s390x instructions appear in the
// comments.
// Implementation for big endian would have to be
// investigated, I think it would be different.
//
//
// Vector multiply word
//
//	VMLF  x0, x1, out_low
//	VMLHF x0, x1, out_hi

	MOVD	$16, R10
	MOVD	$32, R14
	MOVD	$48, R15
	ANDCC	$63, R6, R9	// Check for tailing bytes for later
	PCALIGN $16
	// Case for >= 64 bytes
	// Process 64 bytes per iteration
	// Load 4 vectors of a and b
	// XOR the corresponding vectors
	// from a and b and store the result
loop64:
	LXVD2X	(R4)(R8), VS32
	LXVD2X	(R4)(R10), VS34
	LXVD2X	(R4)(R14), VS36
	LXVD2X	(R4)(R15), VS38
	LXVD2X	(R5)(R8), VS33
	LXVD2X	(R5)(R10), VS35

#define m1		X4
#define m2		X5
#define m3		X6
#define m4		X7
#define shufMask	X8	// input data endian conversion control mask
#define abefSave	X9	// digest hash vector inter-block buffer abef
#define cdghSave	X10	// digest hash vector inter-block buffer cdgh

#define nop(m,a)		// nop instead of final SHA256MSG1 for first and last few rounds

#define sha256msg1(m,a) \	// final SHA256MSG1 for middle rounds that require it

// From http://software.intel.com/en-us/articles
// (look for improving-the-performance-of-the-secure-hash-algorithm-1)
// This implementation is 2x unrolled, and interleaves vector instructions,
// used to precompute W, with scalar computation of current round
// for optimal scheduling.

// Trivial helper macros.
#define UPDATE_HASH(A,TB,C,D,E) \
	ADDL	(R9), A \
	MOVL	A, (R9) \

DATA  ·kcon+0x418(SB)/8, $0x1011121300010203
DATA  ·kcon+0x420(SB)/8, $0x1011121310111213
DATA  ·kcon+0x428(SB)/8, $0x0405060700010203
DATA  ·kcon+0x430(SB)/8, $0x1011121308090a0b
DATA  ·kcon+0x438(SB)/8, $0x0405060700010203
#else
DATA  ·kcon+0x410(SB)/8, $0x1011121300010203
DATA  ·kcon+0x418(SB)/8, $0x1011121310111213 // permutation control vectors
DATA  ·kcon+0x420(SB)/8, $0x0405060700010203

	MOVD  plist_base+0(FP), R1  // r1 points to plist
	MOVD  bpx_offset+24(FP), R2 // r2 offset to BPX vector table
	MOVD  R14, R7               // save r14
	MOVD  R15, R8               // save r15
	MOVWZ 16(R0), R9
	MOVWZ 544(R9), R9
	MOVWZ 24(R9), R9            // call vector in r9
	ADD   R2, R9                // add offset to vector table
	MOVWZ (R9), R9              // r9 points to entry point

// For {en,de}cryptBlockAsm
#define BLK_INP    R3
#define BLK_OUT    R4
#define BLK_KEY    R5
#define BLK_ROUNDS R6
#define BLK_IDX    R7

DATA ·rcon+0x00(SB)/8, $0x0f0e0d0c0b0a0908 // Permute for vector doubleword endian swap
DATA ·rcon+0x08(SB)/8, $0x0706050403020100
DATA ·rcon+0x10(SB)/8, $0x0100000001000000 // RCON
DATA ·rcon+0x18(SB)/8, $0x0100000001000000 // RCON
DATA ·rcon+0x20(SB)/8, $0x1b0000001b000000

	MOVD	pTbl, pTblSave
	// Current tag, after AAD
	VLD1	(tPtr), [ACC0.B16]
	VEOR	ACC1.B16, ACC1.B16, ACC1.B16
	VEOR	ACCM.B16, ACCM.B16, ACCM.B16
	// Prepare initial counter, and the increment vector
	VLD1	(ctrPtr), [CTR.B16]
	VEOR	INC.B16, INC.B16, INC.B16
	MOVD	$1, H0
	VMOV	H0, INC.S[3]
	VREV32	CTR.B16, CTR.B16
	VADD	CTR.S4, INC.S4, CTR.S4
	// Skip to <8 blocks loop
	CMP	$128, srcPtrLen