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src/cmd/asm/internal/asm/testdata/mips64.s
// { // outcode(int($1), &nullgen, 0, &nullgen); // } SYSCALL BEQ R1, 2(PC) RET // More JMP/JAL cases, and canonical names JMP, CALL. JAL foo(SB) // CALL foo(SB) BEQ R1, 2(PC) JMP foo(SB) CALL foo(SB) RET foo(SB) // unary operation NEGW R1, R2 // 00011023 NEGV R1, R2 // 0001102f WSBH R1, R2 // 7c0110a0 DSBH R1, R2 // 7c0110a4 DSHD R1, R2 // 7c011164
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 12.4K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Nov 22 03:55:32 GMT 2023 - 21.6K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm.s
// { // outcode($1, $2, &nullgen, 0, &nullgen); // } BEQ 2(PC) RET // More B/BL cases, and canonical names JMP, CALL. BEQ 2(PC) B foo(SB) // JMP foo(SB) BL foo(SB) // CALL foo(SB) BEQ 2(PC) JMP foo(SB) CALL foo(SB) // CMPF and CMPD are special. CMPF F1, F2 CMPD F1, F2 // AND AND $255, R0, R1 // ff1000e2 AND $4278190080, R0, R1 // ff1400e2
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 15 20:51:01 GMT 2023 - 69K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips.s
// { // outcode(int($1), &nullgen, 0, &nullgen); // } SYSCALL BEQ R1, 2(PC) RET // More JMP/JAL cases, and canonical names JMP, CALL. JAL foo(SB) // CALL foo(SB) BEQ R1, 2(PC) JMP foo(SB) CALL foo(SB) RET foo(SB) // unary operation NEGW R1, R2 // 00011023 CLZ R1, R2 // 70221020 CLO R1, R2 // 70221021 WSBH R1, R2 // 7c0110a0 SEB R1, R2 // 7c011420
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Tue Aug 08 12:17:12 GMT 2023 - 6.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/arm64.s
// RET RET RET foo(SB) // B/BL/B.cond cases, and canonical names JMP, CALL. BL 1(PC) // CALL 1(PC) BL (R2) // CALL (R2) BL foo(SB) // CALL foo(SB) BL bar<>(SB) // CALL bar<>(SB) B foo(SB) // JMP foo(SB) BEQ 1(PC) BEQ 2(PC) TBZ $1, R1, 2(PC) TBNZ $2, R2, 2(PC) JMP foo(SB) CALL foo(SB) // ADR ADR next, R11 // ADR R11 // 2b000010
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Fri Dec 08 03:28:17 GMT 2023 - 94.9K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Apr 24 15:53:25 GMT 2024 - 49K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/amd64error.s
// Copyright 2016 The Go Authors. All rights reserved. // Use of this source code is governed by a BSD-style // license that can be found in the LICENSE file. TEXT errors(SB),$0 MOVL foo<>(SB)(AX), AX // ERROR "invalid instruction" MOVL (AX)(SP*1), AX // ERROR "invalid instruction" EXTRACTPS $4, X2, (BX) // ERROR "invalid instruction" EXTRACTPS $-1, X2, (BX) // ERROR "invalid instruction" // VSIB addressing does not permit non-vector (X/Y)
Others - Registered: Tue Apr 30 11:13:12 GMT 2024 - Last Modified: Wed Jun 14 00:03:57 GMT 2023 - 8.9K bytes - Viewed (0)