50\221\235t\305?T\373\331\273&\341\332?`p\324\205\256\256\254?\256\257\rY\006+\350?\222\224\005<p\356\350?F\235\"\267kn\326?\264\017\372\350\ti\325?\3162\311\"M\353\332?\2364_\361/\235\355?\220\301u\035\002z\252?\314\247$\2451\032\327?\244\021\265\'sP\321?,+F]\326\342\340?\332\325#\327\003 \326?\204U\335\333\236G\343?Hr\307Y\206\272\333?\000FX\274\017\177\304?@\313\275\264\264\345\245?\017\211\304\"\245?\353?,l~\300]?\333?z\251\3563\017s\353?wZ\020\021\354c\351?\370\327E\265h<\312?\340\323@e\374...

		{"Regs386.ES", Field, 0},
		{"Regs386.FLAGS", Field, 0},
		{"Regs386.FS", Field, 0},
		{"Regs386.GS", Field, 0},
		{"Regs386.IP", Field, 0},
		{"Regs386.SI", Field, 0},
		{"Regs386.SP", Field, 0},
		{"Regs386.SS", Field, 0},
		{"RegsAMD64", Type, 0},
		{"RegsAMD64.AX", Field, 0},
		{"RegsAMD64.BP", Field, 0},
		{"RegsAMD64.BX", Field, 0},
		{"RegsAMD64.CS", Field, 0},

			break
		}
		d := auxIntToInt32(v_0.AuxInt)
		x := v_0.Args[0]
		v.reset(OpAMD64ADDLconst)
		v.AuxInt = int32ToAuxInt(c + d)
		v.AddArg(x)
		return true
	}
	// match: (ADDLconst [off] x:(SP))
	// result: (LEAL [off] x)
	for {
		off := auxIntToInt32(v.AuxInt)
		x := v_0
		if x.Op != OpSP {
			break
		}
		v.reset(OpAMD64LEAL)
		v.AuxInt = int32ToAuxInt(off)
		v.AddArg(x)

		v0.AuxInt = int64ToAuxInt(1)
		v.AddArg2(v0, x)
		return true
	}
}
func rewriteValueARM64_OpOffPtr(v *Value) bool {
	v_0 := v.Args[0]
	// match: (OffPtr [off] ptr:(SP))
	// cond: is32Bit(off)
	// result: (MOVDaddr [int32(off)] ptr)
	for {
		off := auxIntToInt64(v.AuxInt)
		ptr := v_0
		if ptr.Op != OpSP || !(is32Bit(off)) {
			break
		}