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Results 1 - 4 of 4 for logging (0.43 seconds)

  1. RELEASE.md

        *   Added APIs for switching between interactive logging and absl logging.
            By default, Keras always writes the logs to stdout. However, this is not
            optimal in a non-interactive environment, where you don't have access to
            stdout, but can only view the logs. You can use
            `tf.keras.utils.disable_interactive_logging()` to write the logs to ABSL
            logging. You can also use `tf.keras.utils.enable_interactive_logging()`
    Created: Tue Dec 30 12:39:10 GMT 2025
    - Last Modified: Tue Oct 28 22:27:41 GMT 2025
    - 740.4K bytes
    - Click Count (3)
  2. docs/en/docs/release-notes.md

    from pydantic import BaseModel
    
    app = FastAPI()
    
    
    class FormData(BaseModel):
        username: str
        password: str
        model_config = {"extra": "forbid"}
    
    
    @app.post("/login/")
    async def login(data: Annotated[FormData, Form()]):
        return data
    ```
    
    Read the new docs: [Form Models - Forbid Extra Form Fields](https://fastapi.tiangolo.com/tutorial/request-form-models/#forbid-extra-form-fields).
    
    Created: Sun Dec 28 07:19:09 GMT 2025
    - Last Modified: Sat Dec 27 19:06:15 GMT 2025
    - 586.7K bytes
    - Click Count (0)
  3. lib/fips140/v1.0.0-c2097c7c.zip

    GOPPC64_power9 #define P8_LXVB16X(RA,RB,VT) LXVB16X (RA+RB), VT #define P8_STXVB16X(VS,RA,RB) STXVB16X VS, (RA+RB) #define XXBRD_ON_LE(VA,VT) XXBRD VA, VT #define SETUP_ESPERM(rtmp) # else // On POWER8/ppc64le, emulate the POWER9 instructions by loading unaligned // doublewords and byte-swapping each doubleword to emulate BE load/stores. #define NEEDS_ESPERM #define P8_LXVB16X(RA,RB,VT) \ LXVD2X (RA+RB), VT \ VPERM VT, VT, ESPERM, VT #define P8_STXVB16X(VS,RA,RB) \ VPERM VS, VS, ESPERM, TMP2 \ STXVD2X...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Sep 25 19:53:19 GMT 2025
    - 642.7K bytes
    - Click Count (0)
  4. lib/fips140/v1.1.0-rc1.zip

    GOPPC64_power9 #define P8_LXVB16X(RA,RB,VT) LXVB16X (RA+RB), VT #define P8_STXVB16X(VS,RA,RB) STXVB16X VS, (RA+RB) #define XXBRD_ON_LE(VA,VT) XXBRD VA, VT #define SETUP_ESPERM(rtmp) # else // On POWER8/ppc64le, emulate the POWER9 instructions by loading unaligned // doublewords and byte-swapping each doubleword to emulate BE load/stores. #define NEEDS_ESPERM #define P8_LXVB16X(RA,RB,VT) \ LXVD2X (RA+RB), VT \ VPERM VT, VT, ESPERM, VT #define P8_STXVB16X(VS,RA,RB) \ VPERM VS, VS, ESPERM, TMP2 \ STXVD2X...
    Created: Tue Dec 30 11:13:12 GMT 2025
    - Last Modified: Thu Dec 11 16:27:41 GMT 2025
    - 663K bytes
    - Click Count (0)
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