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Results 1 - 4 of 4 for r2r1 (0.14 sec)

  1. src/cmd/asm/internal/asm/testdata/arm64.s

    	ADDSW	R19.UXTW, R14, R17              // d141332b
    	ADDS	R12.SXTX, R3, R1                // 61e02cab
    	SUB	R19.UXTH<<4, R2, R21            // 553033cb
    	SUBW	R1.UXTX<<1, R3, R2              // 6264214b
    	SUBS	R3.UXTX, R8, R9                 // 096123eb
    	SUBSW	R17.UXTH, R15, R21              // f521316b
    	SUBW	ZR<<14, R19, R13                // 6d3a1f4b
    	CMP	R2.SXTH, R13                    // bfa122eb
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 94.9K bytes
    - Viewed (0)
  2. src/cmd/compile/internal/ppc64/ssa.go

    		// starting with the largest sizes and generating as
    		// many as needed, using the appropriate offset value.
    		//	MOVD  n(R21),R31
    		//	MOVD  R31,n(R20)
    		//	MOVW  n1(R21),R31
    		//	MOVW  R31,n1(R20)
    		//	MOVH  n2(R21),R31
    		//	MOVH  R31,n2(R20)
    		//	MOVB  n3(R21),R31
    		//	MOVB  R31,n3(R20)
    
    		// Each loop iteration moves 32 bytes
    		ctr := v.AuxInt / bytesPerLoop
    
    		// Remainder after the loop
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 19:59:38 UTC 2024
    - 55.4K bytes
    - Viewed (0)
  3. src/cmd/compile/internal/ssa/_gen/ARM64Ops.go

    			clobberFlags:   true,
    			faultOnNilArg0: true,
    		},
    
    		// duffcopy
    		// arg0 = address of dst memory (in R21, changed as side effect)
    		// arg1 = address of src memory (in R20, changed as side effect)
    		// arg2 = mem
    		// auxint = offset into duffcopy code to start executing
    		// returns mem
    		// R20, R21 changed as side effect
    		// R16 and R17 may be clobbered by linker trampoline.
    		{
    			name:      "DUFFCOPY",
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu May 23 15:49:20 UTC 2024
    - 58.8K bytes
    - Viewed (0)
  4. src/crypto/internal/nistec/p256_asm_ppc64le.s

    TEXT ·p256MovCond(SB), NOSPLIT, $0-32
    	MOVD res+0(FP), P3ptr
    	MOVD a+8(FP), P1ptr
    	MOVD b+16(FP), P2ptr
    	MOVD $16, R16
    	MOVD $32, R17
    	MOVD $48, R18
    	MOVD $56, R21
    	MOVD $64, R19
    	MOVD $80, R20
    	// cond is R1 + 24 (cond offset) + 32
    	LXVDSX (R1)(R21), SEL
    	VSPLTISB $0, ZER
    	// SEL controls whether to store a or b
    	VCMPEQUD SEL, ZER, SEL
    
    	LXVD2X (P1ptr+R0), X1H
    	LXVD2X (P1ptr+R16), X1L
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 56.5K bytes
    - Viewed (0)
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