v.AddArg2(x, y)
		return true
	}
	// match: (SRAW x (MOVWreg y))
	// result: (SRAW x y)
	for {
		x := v_0
		if v_1.Op != OpS390XMOVWreg {
			break
		}
		y := v_1.Args[0]
		v.reset(OpS390XSRAW)
		v.AddArg2(x, y)
		return true
	}
	// match: (SRAW x (MOVHreg y))
	// result: (SRAW x y)
	for {
		x := v_0
		if v_1.Op != OpS390XMOVHreg {

	RLWINM:         "rlwinm",
	RLWINMCC:       "rlwinm.",
	RLWNM:          "rlwnm",
	RLWNMCC:        "rlwnm.",
	SLW:            "slw",
	SLWCC:          "slw.",
	SRAW:           "sraw",
	SRAWCC:         "sraw.",
	SRAWI:          "srawi",
	SRAWICC:        "srawi.",
	SRW:            "srw",
	SRWCC:          "srw.",
	STB:            "stb",
	STBU:           "stbu",
	STBUX:          "stbux",

	// match: (Rsh32x16 x y)
	// cond: shiftIsBounded(v)
	// result: (SRAW x y)
	for {
		x := v_0
		y := v_1
		if !(shiftIsBounded(v)) {
			break
		}
		v.reset(OpPPC64SRAW)
		v.AddArg2(x, y)
		return true
	}
	// match: (Rsh32x16 <t> x y)
	// result: (ISEL [2] (SRAW <t> x y) (SRAWconst <t> x [31]) (CMPconst [0] (ANDconst [0xFFE0] y)))
	for {
		t := v.Type