NEGL - Code Search

src/cmd/compile/internal/ssa/_gen/AMD64Ops.go

		// L = int32, Q = int64
		// L operations zero the upper 4 bytes of the destination register.
		{name: "NEGQ", argLength: 1, reg: gp11, asm: "NEGQ", resultInArg0: true, clobberFlags: true},
		{name: "NEGL", argLength: 1, reg: gp11, asm: "NEGL", resultInArg0: true, clobberFlags: true},
		{name: "NOTQ", argLength: 1, reg: gp11, asm: "NOTQ", resultInArg0: true},
		{name: "NOTL", argLength: 1, reg: gp11, asm: "NOTL", resultInArg0: true},

Registered: Wed Jun 12 16:32:35 UTC 2024

- Last Modified: Fri Aug 04 16:40:24 UTC 2023

- 98K bytes

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github.com/codelibs/fess

src/main/resources/fess_indices/_aws/fess.json

          "type":         "elision",
          "articles": [
                "c", "l", "all", "dall", "dell",
                "nell", "sull", "coll", "pell",
                "gl", "agl", "dagl", "degl", "negl",
                "sugl", "un", "m", "t", "s", "v", "d"
          ]
        },
        "italian_stop": {
          "type":       "stop",

Registered: Wed Jun 12 13:08:18 UTC 2024

- Last Modified: Tue Mar 23 12:38:28 UTC 2021

- 117.3K bytes

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