- Sort Score
- Result 10 results
- Languages All
Results 1 - 7 of 7 for xxlxor (0.17 sec)
-
src/crypto/aes/gcm_ppc64x.s
// Clear the keys XXLXOR VS0, VS0, VS0 XXLXOR VS1, VS1, VS1 XXLXOR VS2, VS2, VS2 XXLXOR VS3, VS3, VS3 XXLXOR VS4, VS4, VS4 XXLXOR VS5, VS5, VS5 XXLXOR VS6, VS6, VS6 XXLXOR VS7, VS7, VS7 XXLXOR VS8, VS8, VS8 XXLXOR VS9, VS9, VS9 XXLXOR VS10, VS10, VS10 XXLXOR VS11, VS11, VS11 XXLXOR VS12, VS12, VS12 XXLXOR VS13, VS13, VS13 XXLXOR VS14, VS14, VS14
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
// arg0 = address of memory to zero (in R3, changed as side effect) // returns mem // // a loop is generated when there is more than one iteration // needed to clear 4 doublewords // // XXLXOR VS32,VS32,VS32 // MOVD $len/32,R31 // MOVD R31,CTR // MOVD $16,R31 // loop: // STXVD2X VS32,(R0)(R3) // STXVD2X VS32,(R31)(R3) // ADD R3,32 // BC loop
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/crypto/sha512/sha512block_ppc64x.s
LVX (TBL)(R_x000), KI LXVD2X (INP)(R0), VS40 // load v8 (=vs40) in advance ADD $16, INP // Copy V0-V7 to VS24-VS31 XXLOR V0, V0, VS24 XXLOR V1, V1, VS25 XXLOR V2, V2, VS26 XXLOR V3, V3, VS27 XXLOR V4, V4, VS28 XXLOR V5, V5, VS29 XXLOR V6, V6, VS30 XXLOR V7, V7, VS31 VADDUDM KI, V7, V7 // h+K[i] LVX (TBL)(R_x010), KI VPERMLE(V8,V8,LEMASK,V8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 15.8K bytes - Viewed (0) -
src/crypto/sha256/sha256block_ppc64x.s
LVX (TBL)(R_x000), KI LXVD2X (INP)(R_x000), V8 // load v8 in advance // Offload to VSR24-31 (aka FPR24-31) XXLOR V0, V0, VS24 XXLOR V1, V1, VS25 XXLOR V2, V2, VS26 XXLOR V3, V3, VS27 XXLOR V4, V4, VS28 XXLOR V5, V5, VS29 XXLOR V6, V6, VS30 XXLOR V7, V7, VS31 VADDUWM KI, V7, V7 // h+K[i] LVX (TBL)(R_x010), KI VPERMLE(V8, V8, LEMASK, V8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 14.4K bytes - Viewed (0) -
src/cmd/internal/notsha256/sha256block_ppc64x.s
LVX (TBL)(R_x000), KI LXVD2X (INP)(R_x000), V8 // load v8 in advance // Offload to VSR24-31 (aka FPR24-31) XXLOR V0, V0, VS24 XXLOR V1, V1, VS25 XXLOR V2, V2, VS26 XXLOR V3, V3, VS27 XXLOR V4, V4, VS28 XXLOR V5, V5, VS29 XXLOR V6, V6, VS30 XXLOR V7, V7, VS31 VADDUWM KI, V7, V7 // h+K[i] LVX (TBL)(R_x010), KI VPERMLE(V8, V8, LEMASK, V8)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:27 UTC 2023 - 14.5K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/a.out.go
AMFVRD AMFVSRWZ AMFVSRLD AMTVSRD AMTFPRD AMTVRD AMTVSRWA AMTVSRWZ AMTVSRDD AMTVSRWS AXXLAND AXXLANDC AXXLEQV AXXLNAND AXXLOR AXXLORC AXXLNOR AXXLORQ AXXLXOR AXXSEL AXXMRGHW AXXMRGLW AXXSPLTW AXXSPLTIB AXXPERM AXXPERMDI AXXSLDWI AXXBRQ AXXBRD AXXBRW AXXBRH AXSCVDPSP
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 16K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
SRAV $12, R3 // 00031b3b ROTR $12, R8 // 00284302 ROTRV $63, R22 // 0036b7fe // LAND/LXOR/LNOR/LOR rreg ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } AND R14, R8 // 010e4024 XOR R15, R9 // 012f4826 NOR R16, R10 // 01505027 OR R17, R11 // 01715825 // LAND/LXOR/LOR imm ',' rreg // { // outcode(int($1), &$2, 0, &$4); // } AND $11, R17, R7 // 3227000b
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0)