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Results 1 - 10 of 11 for v30 (0.02 sec)

  1. src/crypto/aes/gcm_ppc64x.s

    	VXOR V30, V29, V17; \
    	VADDUWM V30, V31, V30; \
    	VXOR V30, V29, V18; \
    	VADDUWM V30, V31, V30
    
    // 8 encryptions in V15 - V22
    #define GEN_VCIPHER_8_INPUTS \
    	XXLOR VS0, VS0, V29; \
    	VXOR V30, V29, V15; \
    	VADDUWM V30, V31, V30; \
    	VXOR V30, V29, V16; \
    	VADDUWM V30, V31, V30; \
    	VXOR V30, V29, V17; \
    	VADDUWM V30, V31, V30; \
    	VXOR V30, V29, V18; \
    	VADDUWM V30, V31, V30; \
    	VXOR V30, V29, V19; \
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Mar 04 17:29:44 UTC 2024
    - 27.1K bytes
    - Viewed (0)
  2. src/runtime/asm_arm64.s

    	VLD1	(R4), [V5.B16, V6.B16, V7.B16]
    	AESE	V30.B16, V1.B16
    	AESMC	V1.B16, V1.B16
    	AESE	V30.B16, V2.B16
    	AESMC	V2.B16, V2.B16
    	AESE	V30.B16, V3.B16
    	AESMC	V3.B16, V3.B16
    	AESE	V30.B16, V4.B16
    	AESMC	V4.B16, V4.B16
    	AESE	V30.B16, V5.B16
    	AESMC	V5.B16, V5.B16
    	AESE	V30.B16, V6.B16
    	AESMC	V6.B16, V6.B16
    	AESE	V30.B16, V7.B16
    	AESMC	V7.B16, V7.B16
    
    	SUB	$64, R2, R10
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Sat May 11 20:38:24 UTC 2024
    - 43.4K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/testdata/arm64error.s

    	VUSHLL	$0, V30.D2, V30.H8                               // ERROR "operand mismatch"
    	VUSHLL2	$0, V20.B8, V21.H8                               // ERROR "operand mismatch"
    	VUSHLL	$8, V30.B8, V30.H8                               // ERROR "shift amount out of range"
    	VUSHLL2	$32, V30.S4, V2.D2                               // ERROR "shift amount out of range"
    	VBIF	V0.B8, V1.B8, V2.B16                             // ERROR "operand mismatch"
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	//TODO VFADDP V30.S4, V3.S4, V11.S4        // 6bd43e6e
    	FCCMPS LE, F17, F12, $14                   // 8ed5311e
    	FCCMPD HI, F11, F15, $15                   // ef856b1e
    	FCCMPES HS, F28, F13, $13                  // bd253c1e
    	FCCMPED LT, F20, F4, $9                    // 99b4741e
    	//TODO FCMEQ F7, F11, F26                  // 7ae5675e
    	//TODO VFCMEQ V29.S4, V26.S4, V30.S4       // 5ee73d4e
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/s390x.s

    	VPOPCT	V8, V19                 // e73800000850
    	VFEEZBS	V1, V2, V31             // e7f120300880
    	WFCHDBS	V22, V23, V4            // e746701836eb
    	VMNH	V1, V2, V30             // e7e1200018fe
    	VERLLVF	V2, V30, V27            // e7be20002c73
    	VSCBIB	V0, V23, V24            // e78700000cf5
    	VN	V2, V1, V0              // e70210000068
    	VNC	V2, V1, V0              // e70210000069
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed Nov 22 03:55:32 UTC 2023
    - 21.6K bytes
    - Viewed (0)
  6. src/math/big/arith_s390x.s

    	VACQ   V5, V13, V28, V21
    	VACCCQ V6, V14, V29, V30
    	VACQ   V6, V14, V29, V22
    
    	VPDI $0x4, V7, V7, V7    // flip the doublewords to big-endian order
    	VPDI $0x4, V8, V8, V8    // flip the doublewords to big-endian order
    	VPDI $0x4, V15, V15, V15 // flip the doublewords to big-endian order
    	VPDI $0x4, V16, V16, V16 // flip the doublewords to big-endian order
    
    	VACCCQ V7, V15, V30, V31
    	VACQ   V7, V15, V30, V23
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:27 UTC 2023
    - 20.3K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/asm/operand_test.go

    	{"V19", "V19"},
    	{"V20", "V20"},
    	{"V21", "V21"},
    	{"V22", "V22"},
    	{"V23", "V23"},
    	{"V24", "V24"},
    	{"V25", "V25"},
    	{"V26", "V26"},
    	{"V27", "V27"},
    	{"V28", "V28"},
    	{"V29", "V29"},
    	{"V30", "V30"},
    	{"V31", "V31"},
    	{"F14", "F14"},
    	{"F15", "F15"},
    	{"F16", "F16"},
    	{"F17", "F17"},
    	{"F18", "F18"},
    	{"F19", "F19"},
    	{"F20", "F20"},
    	{"F21", "F21"},
    	{"F22", "F22"},
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  8. src/internal/bytealg/index_ppc64x.s

    	MOVD $2, R15      // Set up index
    
    	// Set up masks for use with VSEL
    	MOVD   $0xff, R21        // Set up mask 0xff000000ff000000...
    	SLD    $24, R21
    	MTVSRD R21, V10
    	VSPLTW $1, V10, V29
    	VSLDOI $2, V29, V29, V30 // Mask 0x0000ff000000ff00...
    	MOVD   $0xffff, R21
    	SLD    $16, R21
    	MTVSRD R21, V10
    	VSPLTW $1, V10, V31      // Mask 0xffff0000ffff0000...
    	VSPLTW $0, V0, V1        // Splat 1st word of separator
    
    index4loop:
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Fri Apr 21 16:47:45 UTC 2023
    - 31.6K bytes
    - Viewed (0)
  9. src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/inst.go

    	V5
    	V6
    	V7
    	V8
    	V9
    	V10
    	V11
    	V12
    	V13
    	V14
    	V15
    	V16
    	V17
    	V18
    	V19
    	V20
    	V21
    	V22
    	V23
    	V24
    	V25
    	V26
    	V27
    	V28
    	V29
    	V30
    	V31
    
    	WSP = WZR // These are different registers with the same encoding.
    	SP  = XZR // These are different registers with the same encoding.
    )
    
    func (Reg) isArg() {}
    
    func (r Reg) String() string {
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Thu Oct 19 23:33:33 UTC 2023
    - 21.5K bytes
    - Viewed (0)
  10. src/runtime/asm_ppc64x.s

    	STVX	V25, (R0+R12)
    	MOVD	$-96, R12
    	STVX	V26, (R0+R12)
    	MOVD	$-80, R12
    	STVX	V27, (R0+R12)
    	MOVD	$-64, R12
    	STVX	V28, (R0+R12)
    	MOVD	$-48, R12
    	STVX	V29, (R0+R12)
    	MOVD	$-32, R12
    	STVX	V30, (R0+R12)
    	MOVD	$-16, R12
    	STVX	V31, (R0+R12)
    	RET
    TEXT runtimeĀ·elf_restvr(SB),NOSPLIT|NOFRAME,$0
    	// R0 holds the save location, R12 is clobbered
    	MOVD	$-192, R12
    	LVX	(R0+R12), V20
    	MOVD	$-176, R12
    Registered: Wed Jun 12 16:32:35 UTC 2024
    - Last Modified: Wed May 22 18:17:17 UTC 2024
    - 45.4K bytes
    - Viewed (0)
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