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Results 1 - 10 of 11 for mfvscr (0.24 sec)
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src/internal/bytealg/index_ppc64x.s
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 31.6K bytes - Viewed (0) -
src/runtime/mkpreempt.go
for i := 0; i <= 31; i++ { reg := fmt.Sprintf("F%d", i) l.add("FMOVD", reg, 8) } // Add floating point control/status register FPSCR. l.addSpecial( "MOVFL FPSCR, F0\nFMOVD F0, %d(R1)", "FMOVD %d(R1), F0\nMOVFL F0, FPSCR", 8) p("MOVD R31, -%d(R1)", l.stack-32) // save R31 first, we'll use R31 for saving LR p("MOVD LR, R31")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Nov 20 17:19:36 UTC 2023 - 15.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/mips64.s
// outcode(int($1), &$2, 0, &$4); // } MOVD F1, foo<>+3(SB) MOVD F1, 16(R2) MOVD F1, (R2) // // floating point status // // LMOVW fpscr ',' freg // { // outcode(int($1), &$2, 0, &$4); // } MOVW FCR31, R1 // 4441f800 // LMOVW freg ',' fpscr // { // outcode(int($1), &$2, 0, &$4); // } MOVW R1, FCR31 // 44c1f800 // LMOVW rreg ',' mreg // { // outcode(int($1), &$2, 0, &$4);
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 08 12:17:12 UTC 2023 - 12.4K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/arm/armasm/decode.go
// It returns nil if x cannot be decoded according to aop. func decodeArg(aop instArg, x uint32) Arg { switch aop { default: return nil case arg_APSR: return APSR case arg_FPSCR: return FPSCR case arg_R_0: return Reg(x & (1<<4 - 1)) case arg_R_8: return Reg((x >> 8) & (1<<4 - 1)) case arg_R_12: return Reg((x >> 12) & (1<<4 - 1)) case arg_R_16: return Reg((x >> 16) & (1<<4 - 1))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 12.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/gnu.go
startArg = 1 case 9: buf.WriteString("ctr") startArg = 1 default: buf.WriteString("spr") } default: buf.WriteString("spr") } case "mfspr": opcode := inst.Op.String() buf.WriteString(opcode[0:2]) arg := inst.Args[0] switch spr := inst.Args[1].(type) { case SpReg: switch spr { case 1: buf.WriteString("xer ")
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Oct 19 23:33:33 UTC 2023 - 12.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/a.out.go
C_SOREG /* An $n+reg memory arg where n is a 16 bit signed offset */ C_LOREG /* An $n+reg memory arg where n is a 32 bit signed offset */ C_XOREG /* An reg+reg memory arg */ C_FPSCR /* The fpscr register */ C_LR /* The link register */ C_CTR /* The count register */ C_ANY /* Any argument */ C_GOK /* A non-matched argument */ C_ADDR /* A symbolic memory location */
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 16K bytes - Viewed (0) -
src/hash/crc32/crc32_ppc64le.s
VSLDOI $8,V0,zeroes,V0 #else VAND V0,mask_32bit,V1 VPMSUMD V1,const1,V1 VAND V1,mask_32bit,V1 VPMSUMD V1,const2,V1 VXOR V0,V1,V0 VSLDOI $4,V0,zeroes,V0 #endif MFVSRD VS32,R3 // VS32 = V0 NOR R3,R3,R3 // return ^crc MOVW R3,ret+32(FP) RET first_warm_up_done: LVX (R3),const1 ADD $16,R3 VPMSUMD V16,const1,V8 VPMSUMD V17,const1,V9
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon May 06 12:09:50 UTC 2024 - 13.1K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
// There are optimizations that should apply -- (Xi2f64 (MOVWload (not-ADD-ptr+offset) ) ) could use // the word-load instructions. (Xi2f64 (MOVDload ptr )) can be (FMOVDload ptr) {name: "MFVSRD", argLength: 1, reg: fpgp, asm: "MFVSRD", typ: "Int64"}, // move 64 bits of F register into G register {name: "MTVSRD", argLength: 1, reg: gpfp, asm: "MTVSRD", typ: "Float64"}, // move 64 bits of G register into F register
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/runtime/asm_arm.s
// disable runfast (flush-to-zero) mode of vfp if runtime.goarmsoftfp == 0 MOVB runtime·goarmsoftfp(SB), R11 CMP $0, R11 BNE 4(PC) WORD $0xeef1ba10 // vmrs r11, fpscr BIC $(1<<24), R11 WORD $0xeee1ba10 // vmsr fpscr, r11 RET TEXT runtime·mstart(SB),NOSPLIT|TOPFRAME,$0 BL runtime·mstart0(SB) RET // not reached /* * go-routine */ // void gogo(Gobuf*)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 23 21:00:52 UTC 2024 - 32.1K bytes - Viewed (0)