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Results 1 - 2 of 2 for VLSEG2E8V (0.03 sec)
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src/cmd/asm/internal/asm/testdata/riscv64validation.s
VSOXEI8V V3, V2, (V1) // ERROR "expected integer register in rs1 position" VSOXEI8V V3, X11, V0, (X10) // ERROR "expected vector register in vs2 position" VLSEG2E8V (X10), X10 // ERROR "expected vector register in vd position" VLSEG2E8V (V1), V3 // ERROR "expected integer register in rs1 position" VLSEG2E8FFV (X10), X10 // ERROR "expected vector register in vd position"
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Thu Nov 13 12:17:37 UTC 2025 - 42.1K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/riscv64error.s
VSUXEI8V V3, V2, V1, (X10) // ERROR "invalid vector mask register" VLOXEI8V (X10), V2, V1, V3 // ERROR "invalid vector mask register" VSOXEI8V V3, V2, V1, (X10) // ERROR "invalid vector mask register" VLSEG2E8V (X10), V1, V3 // ERROR "invalid vector mask register" VLSEG2E8FFV (X10), V1, V3 // ERROR "invalid vector mask register" VSSEG2E8V V3, V1, (X10) // ERROR "invalid vector mask register"
Registered: Tue Dec 30 11:13:12 UTC 2025 - Last Modified: Wed Sep 24 13:21:53 UTC 2025 - 26.8K bytes - Viewed (0)