case STLXR, STXR:
		if r, ok := inst.Args[1].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}
		args[1], args[2] = args[2], args[1]

	case STLXRB, STLXRH, STXRB, STXRH:
		args[1], args[2] = args[2], args[1]

	case BFI, BFXIL, SBFIZ, SBFX, UBFIZ, UBFX:
		if r, ok := inst.Args[0].(Reg); ok {
			rno := uint16(r)
			if rno <= uint16(WZR) {
				op += "W"
			}
		}

	STXPW (R1, R2), (R3), R10                  // 61082a88
	STXPW (R1, R2), (RSP), R10                 // e10b2a88
	STXRW R2, (R19), R20                       // 627e1488
	STXR R15, (R21), R13                       // af7e0dc8
	STXRB R7, (R9), R24                        // 277d1808
	STXRH R12, (R3), R8                        // 6c7c0848
	SUBW R20.UXTW<<2, R23, R19                 // f34a344b
	SUB R5.SXTW<<2, R1, R26                    // 3ac825cb