VST1 [V2.S4, V3.S4, V4.S4, V5.S4], (R14)                    // c229004c
	VST1.P [V25.S4], (R7)(R29)                                  // f9789d4c
	VST1.P [V25.D2, V26.D2], 32(R7)                             // f9ac9f4c
	VST1.P [V14.D1, V15.D1], (R7)(R23)                          // eeac970c
	VST1.P [V25.D2, V26.D2, V27.D2], 48(R27)                    // 796f9f4c

	ADDS	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	ADDSW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	SUB	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"
	SUBW	R7@>2, R5, R16                                   // ERROR "unsupported shift operator"

	XORW	(R1), R2              // 57201000
	XORW	-1(R1), R2            // e3201fffff57

	// shift and rotate instructions
	SRD	$4, R4, R7              // eb740004000c
	SRD	R1, R4, R7              // eb741000000c
	SRW	$4, R4, R7              // eb74000400de
	SRW	R1, R4, R7              // eb74100000de
	SLW	$4, R3, R6              // eb63000400df
	SLW	R2, R3, R6              // eb63200000df

	{"R2", "R2"},
	{"R3", "R3"},
	{"R4", "R4"},
	{"R(4)", "R4"},
	{"R5", "R5"},
	{"R6", "R6"},
	{"R7", "R7"},
	{"R8", "R8"},
	{"[R0,R1,g,R15]", "[R0,R1,g,R15]"},
	{"[R0-R7]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
	{"[R(0)-R(7)]", "[R0,R1,R2,R3,R4,R5,R6,R7]"},
	{"[R0]", "[R0]"},
	{"[R1-R12]", "[R1,R2,R3,R4,R5,R6,R7,R8,R9,g,R11,R12]"},
	{"armCAS64(SB)", "armCAS64(SB)"},
	{"asmcgocall<>(SB)", "asmcgocall<>(SB)"},

	LL	(R1), R2	// c0220000

//	LMOVH addr ',' rreg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}
	MOVH	foo<>+3(SB), R2
	MOVH	(R20), R7	// 86870000
	MOVH	54(R11), R26	// 857a0036
	MOVH	-42(R3), R20	// 8474ffd6
	MOVHU	(R20), R7	// 96870000
	MOVHU	54(R11), R26	// 957a0036
	MOVHU	-42(R3), R20	// 9474ffd6

//	LMOVB addr ',' rreg
//	{
//		outcode(int($1), &$2, 0, &$4);
//	}

	MOVW.S	$0xaaaaaaaa, R7    // ERROR "invalid .S suffix"
	MOVW.P	$0xffffff44, R1    // ERROR "invalid .P suffix"
	MOVW.S	$0xffffff77, R1    // ERROR "invalid .S suffix"
	MVN.S	$0xffffffaa, R8    // ERROR "invalid .S suffix"
	MVN.S	$0xaaaaaaaa, R8    // ERROR "invalid .S suffix"
	ADD.U	$0xaaaaaaaa, R4    // ERROR "invalid .U suffix"
	ORR.P	$0x555555, R7, R3  // ERROR "invalid .P suffix"

	PSTB R1, $1, 12345678(R2)               // 061000bc9822614e
	PSTD R1, $1, 12345678(R2)               // 041000bcf422614e
	PSTFD F1, $1, 12345678(R2)              // 061000bcd822614e
	PSTFS F1, $1, 123456789(R7)             // 0610075bd027cd15
	PSTH R1, $1, 12345678(R2)               // 061000bcb022614e
	PSTQ R2, $1, 12345678(R2)               // 041000bcf042614e
	PSTW R1, $1, 12345678(R2)               // 061000bc9022614e

The range of registers is specified by a start register and an end register.
For example, <code>LMG</code> <code>(R9),</code> <code>R5,</code> <code>R7</code> would load
<code>R5</code>, <code>R6</code> and <code>R7</code> with the 64-bit values at
<code>0(R9)</code>, <code>8(R9)</code> and <code>16(R9)</code> respectively.
</p>

<p>

		}
		// fmt.Printf("SYM %s\n", obj.Dconv(&emptyProg, 0, a))
		if p.peek() == scanner.EOF {
			return
		}
	}

	// Special register list syntax for arm: [R1,R3-R7]
	if tok.ScanToken == '[' {
		if prefix != 0 {
			p.errorf("illegal use of register list")
		}
		p.registerList(a)
		p.expectOperandEnd()
		return
	}

	// Register: R1