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Results 1 - 6 of 6 for R11 (0.04 sec)

  1. src/cmd/asm/internal/asm/testdata/mips64.s

    //	}
    	MOVW	foo<>+3(SB), R2
    	MOVW	(R11), R22	// 8d760000
    	MOVW	1(R9), R24	// 8d380001
    	MOVW	-17(R24), R8	// 8f08ffef
    	MOVWU	(R11), R22	// 9d760000
    	MOVWU	1(R9), R24	// 9d380001
    	MOVWU	-17(R24), R8	// 9f08ffef
    	LL	(R1), R2	// c0220000
    
    //	LMOVH addr ',' rreg
    //	{
    //		outcode(int($1), &$2, 0, &$4);
    //	}
    	MOVH	foo<>+3(SB), R2
    	MOVH	(R20), R7	// 86870000
    	MOVH	54(R11), R26	// 857a0036
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/arm64enc.s

    	ADDW $(3076<<12), R17, R3                  // ADDW $12599296, R17, R3           // 23127011
    	ADD $2280, R25, R11                        // 2ba32391
    	ADD $(2280<<12), R25, R11                  // ADD $9338880, R25, R11            // 2ba36391
    	ADDW R13->5, R11, R7                       // 67158d0b
    	ADD R25<<54, R17, R16                      // 30da198b
    	ADDSW R12.SXTX<<1, R29, R7                 // a7e72c2b
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Jul 24 01:11:41 UTC 2023
    - 43.9K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/operand_test.go

    	{"$256", "$256"},
    	{"(R0)", "(R0)"},
    	{"(R11)", "(R11)"},
    	{"(g)", "(g)"},
    	{"-12(R4)", "-12(R4)"},
    	{"0(PC)", "0(PC)"},
    	{"1024", "1024"},
    	{"12(R(1))", "12(R1)"},
    	{"12(R13)", "12(R13)"},
    	{"R0", "R0"},
    	{"R0->(32-1)", "R0->31"},
    	{"R0<<R1", "R0<<R1"},
    	{"R0>>R(1)", "R0>>R1"},
    	{"R0@>(32-1)", "R0@>31"},
    	{"R1", "R1"},
    	{"R11", "R11"},
    	{"R12", "R12"},
    	{"R13", "R13"},
    	{"R14", "R14"},
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/testdata/s390x.s

    	LAA	R1, R2, 524287(R3)    // eb213fff7ff8
    	LAAG	R4, R5, -524288(R6)   // eb54600080e8
    	LAAL	R7, R8, 8192(R9)      // eb87900002fa
    	LAALG	R10, R11, -8192(R12)  // ebbac000feea
    	LAN	R1, R2, (R3)          // eb21300000f4
    	LANG	R4, R5, (R6)          // eb54600000e4
    	LAX	R7, R8, (R9)          // eb87900000f7
    	LAXG	R10, R11, (R12)       // ebbac00000e7
    	LAO	R1, R2, (R3)          // eb21300000f6
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/arm64error.s

    	STP.P	(R1, R2), 8(R2)                                  // ERROR "constrained unpredictable behavior"
    	STLXP	(R6, R11), (RSP), R6                             // ERROR "constrained unpredictable behavior"
    	STXP	(R6, R11), (R2), R2                              // ERROR "constrained unpredictable behavior"
    	STLXR	R3, (RSP), R3                                    // ERROR "constrained unpredictable behavior"
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Dec 08 03:28:17 UTC 2023
    - 37.8K bytes
    - Viewed (0)
  6. doc/asm.html

    that may not be expressible using a single hardware instruction.
    It implements these forms as multiple instructions, often using the <code>R11</code> register
    to hold temporary values.
    Hand-written assembly can use <code>R11</code>, but doing so requires
    being sure that the linker is not also using it to implement any of the other
    instructions in the function.
    </p>
    
    <p>
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Nov 28 19:15:27 UTC 2023
    - 36.3K bytes
    - Viewed (0)
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