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Results 1 - 10 of 20 for PC (0.03 sec)

  1. src/cmd/asm/internal/asm/testdata/s390x.s

    	CMPBLE	R7, $127, 0(PC)        // ec7c00007f7c
    	CMPBGT	R9, $0, 0(PC)          // ec920000007c
    	CMPBGE	R2, $128, 0(PC)        // ec2a0000807c
    
    	CMPUBNE	R1, R2, 0(PC)          // ec1200007065
    	CMPUBEQ	R3, R4, 0(PC)          // ec3400008065
    	CMPUBLT	R5, R6, 0(PC)          // ec5600004065
    	CMPUBLE	R7, R8, 0(PC)          // ec780000c065
    	CMPUBGT	R9, R1, 0(PC)          // ec9100002065
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Wed Sep 18 15:49:24 UTC 2024
    - 22.1K bytes
    - Viewed (0)
  2. src/cmd/asm/internal/asm/testdata/mips64.s

    //	}
    	BEQ	R1, 2(PC)
    label0:
    	JMP	1(PC)		// JMP 1(PC)	// 10000001
    	BEQ	R1, 2(PC)
    	JMP	label0+0	// JMP 3	// 1000fffd
    	BEQ	R1, 2(PC)
    	JAL	1(PC)		// CALL 1(PC)	// 0c00000f
    	BEQ	R1, 2(PC)
    	JAL	label0+0	// CALL 3	// 0c000007
    
    //	LBRA addr
    //	{
    //		outcode(int($1), &nullgen, 0, &$2);
    //	}
    	BEQ	R1, 2(PC)
    	JMP	0(R1)		// JMP (R1)	// 00200008
    	BEQ	R1, 2(PC)
    	JMP	foo+0(SB)	// JMP foo(SB)	// 08000019
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 08 12:17:12 UTC 2023
    - 12.4K bytes
    - Viewed (0)
  3. src/cmd/asm/internal/asm/operand_test.go

    	{"(SI)(DX*1)", "(SI)(DX*1)"},
    	{"(SP)", "(SP)"},
    	{"(SP)(AX*4)", "(SP)(AX*4)"},
    	{"32(SP)(BX*2)", "32(SP)(BX*2)"},
    	{"32323(SP)(R8*4)", "32323(SP)(R8*4)"},
    	{"+3(PC)", "3(PC)"},
    	{"-1(DI)(BX*1)", "-1(DI)(BX*1)"},
    	{"-3(PC)", "-3(PC)"},
    	{"-64(SI)(BX*1)", "-64(SI)(BX*1)"},
    	{"-96(SI)(BX*1)", "-96(SI)(BX*1)"},
    	{"AL", "AL"},
    	{"AX", "AX"},
    	{"BP", "BP"},
    	{"BX", "BX"},
    	{"CX", "CX"},
    	{"DI", "DI"},
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Tue Aug 29 18:31:05 UTC 2023
    - 23.9K bytes
    - Viewed (0)
  4. src/cmd/asm/internal/asm/endtoend_test.go

    		}
    
    		f := strings.Fields(string(buf))
    
    		// Turn relative (PC) into absolute (PC) automatically,
    		// so that most branch instructions don't need comments
    		// giving the absolute form.
    		if len(f) > 0 && strings.Contains(printed, "(PC)") {
    			index := len(f) - 1
    			suf := "(PC)"
    			for !strings.HasSuffix(f[index], suf) {
    				index--
    				suf = "(PC),"
    			}
    			str := f[index]
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Dec 07 18:42:59 UTC 2023
    - 11.6K bytes
    - Viewed (0)
  5. src/cmd/asm/internal/asm/testdata/riscv64.s

    	// Branch pseudo-instructions
    	BEQZ	X5, 2(PC)				// 63840200
    	BGEZ	X5, 2(PC)				// 63d40200
    	BGT	X5, X6, 2(PC)				// 63445300
    	BGTU	X5, X6, 2(PC)				// 63645300
    	BGTZ	X5, 2(PC)				// 63445000
    	BLE	X5, X6, 2(PC)				// 63545300
    	BLEU	X5, X6, 2(PC)				// 63745300
    	BLEZ	X5, 2(PC)				// 63545000
    	BLTZ	X5, 2(PC)				// 63c40200
    	BNEZ	X5, 2(PC)				// 63940200
    
    	// Set pseudo-instructions
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Fri Oct 25 12:05:29 UTC 2024
    - 16.8K bytes
    - Viewed (0)
  6. internal/logger/logger.go

    	}
    	return filepath.FromSlash(f)
    }
    
    func getSource(level int) string {
    	pc, file, lineNumber, ok := runtime.Caller(level)
    	if ok {
    		// Clean up the common prefixes
    		file = trimTrace(file)
    		_, funcName := filepath.Split(runtime.FuncForPC(pc).Name())
    		return fmt.Sprintf("%v:%v:%v()", file, lineNumber, funcName)
    	}
    	return ""
    }
    
    Registered: Sun Nov 03 19:28:11 UTC 2024
    - Last Modified: Thu Aug 22 09:43:48 UTC 2024
    - 12.4K bytes
    - Viewed (0)
  7. src/cmd/asm/internal/arch/arch.go

    	// Create maps for easy lookup of instruction names etc.
    	for i, s := range x86.Register {
    		register[s] = int16(i + x86.REG_AL)
    	}
    	// Pseudo-registers.
    	register["SB"] = RSB
    	register["FP"] = RFP
    	register["PC"] = RPC
    	if linkArch == &x86.Linkamd64 {
    		// Alias g to R14
    		register["g"] = x86.REGG
    	}
    	// Register prefix not used on this architecture.
    
    	instructions := make(map[string]obj.As)
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Thu Oct 24 12:32:56 UTC 2024
    - 21.5K bytes
    - Viewed (0)
  8. src/cmd/asm/internal/asm/testdata/loong64enc1.s

    	ROTRV	$4, R4			// 84104d00
    	SYSCALL				// 00002b00
    	BEQ	R4, R5, 1(PC)		// 85040058
    	BEQ	R4, 1(PC)		// 80040040
    	BEQ	R4, R0, 1(PC)		// 80040040
    	BEQ	R0, R4, 1(PC)		// 80040040
    	BNE	R4, R5, 1(PC)		// 8504005c
    	BNE	R4, 1(PC)		// 80040044
    	BNE	R4, R0, 1(PC)		// 80040044
    	BNE	R0, R4, 1(PC)		// 80040044
    	BLTU	R4, 1(PC)		// 80040068
    	MOVF	y+8(FP), F4		// 6440002b
    	MOVD	y+8(FP), F4		// 6440802b
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Sat Nov 02 01:36:19 UTC 2024
    - 11.6K bytes
    - Viewed (0)
  9. architecture/networking/pilot.md

    #### Conclusion
    
    Overall, the high level config ingestion flow:
    
    ```mermaid
    graph TD
        sd(Service Discovery)
        cs(ConfigStore)
        ep(Endpoints)
        pc(PushContext)
        sd-->pc
        cs-->pc
        sd-->ep
    ```
    
    ### Config Translation
    
    Registered: Wed Nov 06 22:53:10 UTC 2024
    - Last Modified: Wed Feb 07 17:53:24 UTC 2024
    - 19.1K bytes
    - Viewed (0)
  10. src/cmd/asm/internal/asm/asm.go

    	} else {
    		p.lastProg.Link = prog
    	}
    	p.lastProg = prog
    	if doLabel {
    		p.pc++
    		for _, label := range p.pendingLabels {
    			if p.labels[label] != nil {
    				p.errorf("label %q multiply defined", label)
    				return
    			}
    			p.labels[label] = prog
    		}
    		p.pendingLabels = p.pendingLabels[0:0]
    	}
    	prog.Pc = p.pc
    	if *flags.Debug {
    		fmt.Println(p.lineNum, prog)
    	}
    	if testOut != nil {
    Registered: Tue Nov 05 11:13:11 UTC 2024
    - Last Modified: Mon Oct 21 14:11:44 UTC 2024
    - 25.5K bytes
    - Viewed (0)
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