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Results 1 - 3 of 3 for MSR (0.01 seconds)
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src/cmd/asm/internal/asm/testdata/arm64error.s
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 24 21:29:25 GMT 2026 - 38.5K bytes - Click Count (0) -
src/cmd/asm/internal/asm/testdata/arm64enc.s
MOVD $0, R5 // e5031faa MSR $1, SPSel // bf4100d5 MSR $9, DAIFSet // df4903d5 MSR $6, DAIFClr // ff4603d5 MRS ELR_EL1, R8 // 284038d5 MSR R16, ELR_EL1 // 304018d5 MRS DCZID_EL0, R3 // e3003bd5
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Tue Feb 24 21:29:25 GMT 2026 - 44K bytes - Click Count (0) -
src/cmd/asm/internal/arch/arch.go
} register["CR"] = ppc64.REG_CR register["XER"] = ppc64.REG_XER register["LR"] = ppc64.REG_LR register["CTR"] = ppc64.REG_CTR register["FPSCR"] = ppc64.REG_FPSCR register["MSR"] = ppc64.REG_MSR // Pseudo-registers. register["SB"] = RSB register["FP"] = RFP register["PC"] = RPC // Avoid unintentionally clobbering g using R30. delete(register, "R30") register["g"] = ppc64.REG_R30
Created: Tue Apr 07 11:13:11 GMT 2026 - Last Modified: Fri Mar 20 17:02:17 GMT 2026 - 22K bytes - Click Count (0)