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Results 1 - 6 of 6 for srw (0.02 sec)
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test/codegen/memcombine.go
// ppc64le:"MOVW",-"MOVH",-"SRW" p.a = uint16(x) // amd64:-"MOVW",-"SHRL" // arm64:-"MOVH",-"UBFX" // ppc64le:-"MOVH",-"SRW" p.b = uint16(x >> 16) } func store16be(p *struct{ a, b uint16 }, x uint32) { // ppc64:"MOVW",-"MOVH",-"SRW" // s390x:"MOVW",-"MOVH",-"SRW" p.a = uint16(x >> 16) // ppc64:-"MOVH",-"SRW" // s390x:-"MOVH",-"SRW" p.b = uint16(x) }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Thu Mar 21 19:45:41 UTC 2024 - 29.7K bytes - Viewed (0) -
test/codegen/shift.go
c[1] = c[((v>>7)&0x3F)<<7] } func checkShiftMask(a uint32, b uint64, z []uint32, y []uint64) { _ = y[128] _ = z[128] // ppc64x: -"MOVBZ", -"SRW", "RLWNM" z[0] = uint32(uint8(a >> 5)) // ppc64x: -"MOVBZ", -"SRW", "RLWNM" z[1] = uint32(uint8((a >> 4) & 0x7e)) // ppc64x: "RLWNM\t[$]25, R[0-9]+, [$]27, [$]29, R[0-9]+" z[2] = uint32(uint8(a>>7)) & 0x1c // ppc64x: -"MOVWZ"
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 18:53:43 UTC 2024 - 12.7K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/s390x.s
XORW -1(R1), R2 // e3201fffff57 // shift and rotate instructions SRD $4, R4, R7 // eb740004000c SRD R1, R4, R7 // eb741000000c SRW $4, R4, R7 // eb74000400de SRW R1, R4, R7 // eb74100000de SLW $4, R3, R6 // eb63000400df SLW R2, R3, R6 // eb63200000df SLD $4, R3, R6 // eb630004000d
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed Nov 22 03:55:32 UTC 2023 - 21.6K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/plan9.go
case FADDCC, FADDSCC, FSUBCC, FMULCC, FDIVCC, FDIVSCC: return true case OR, ORCC, ORC, ORCCC, AND, ANDCC, ANDC, ANDCCC, XOR, XORCC, NAND, NANDCC, EQV, EQVCC, NOR, NORCC: return true case SLW, SLWCC, SLD, SLDCC, SRW, SRAW, SRWCC, SRAWCC, SRD, SRDCC, SRAD, SRADCC: return true } return false } // revCondMap maps a conditional register bit to its inverse, if possible. var revCondMap = map[string]string{
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 10.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
{name: "SRAW", argLength: 2, reg: gp21cxer, asm: "SRAW"}, // signed arg0 >> (arg1&63), 32 bit width {name: "SRD", argLength: 2, reg: gp21, asm: "SRD"}, // unsigned arg0 >> (arg1&127), 64 bit width {name: "SRW", argLength: 2, reg: gp21, asm: "SRW"}, // unsigned arg0 >> (arg1&63), 32 bit width {name: "SLD", argLength: 2, reg: gp21, asm: "SLD"}, // arg0 << (arg1&127), 64 bit width
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/doc.go
Examples: SRAD $8,R3,R4 => sradi r4,r3,8 SRD $8,R3,R4 => rldicl r4,r3,56,8 SLD $8,R3,R4 => rldicr r4,r3,8,55 SRAW $16,R4,R5 => srawi r5,r4,16 SRW $40,R4,R5 => rlwinm r5,r4,0,0,31 SLW $12,R4,R5 => rlwinm r5,r4,12,0,19 Some non-simple shifts have operands in the Go assembly which don't map directly
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 11.3K bytes - Viewed (0)