MOVD	$128, R20 \
	MOVD	$144, R21 \
	LXVD2X	(R0+Rkeyp), V6 \
	ADD	$16, Rkeyp \
	BEQ	CR1, L_start10 \
	BEQ	CR2, L_start12 \
	LXVD2X	(R0+Rkeyp), V7 \
	LXVD2X	(R12+Rkeyp), V8 \
	ADD	$32, Rkeyp \
	L_start12: \
	LXVD2X	(R0+Rkeyp), V9 \
	LXVD2X	(R12+Rkeyp), V10 \
	ADD	$32, Rkeyp \
	L_start10: \
	LXVD2X	(R0+Rkeyp), V11 \
	LXVD2X	(R12+Rkeyp), V12 \
	LXVD2X	(R14+Rkeyp), V13 \
	LXVD2X	(R15+Rkeyp), V14 \

	MOVD	$48, R18; \
	MOVD	$64, R19; \
	LXVD2X (blk_key)(R0), VS0; \
	LXVD2X (blk_key)(R16), VS1; \
	LXVD2X (blk_key)(R17), VS2; \
	LXVD2X (blk_key)(R18), VS3; \
	LXVD2X (blk_key)(R19), VS4; \
	ADD $64, R16; \
	ADD $64, R17; \
	ADD $64, R18; \
	ADD $64, R19; \
	LXVD2X (blk_key)(R16), VS5; \
	LXVD2X (blk_key)(R17), VS6; \
	LXVD2X (blk_key)(R18), VS7; \
	LXVD2X (blk_key)(R19), VS8; \
	ADD $64, R16; \

	MOVWZ	$8, TEMP
	LVSL	(TEMP)(R0), LEMASK
	VSPLTISB	$0x0F, KI
	VXOR	KI, LEMASK, LEMASK
#endif

	LXVD2X	(CTX)(R_x000), VS32	// v0 = vs32
	LXVD2X	(CTX)(R_x010), VS34	// v2 = vs34
	LXVD2X	(CTX)(R_x020), VS36	// v4 = vs36

	// unpack the input values into vector registers
	VSLDOI	$8, V0, V0, V1
	LXVD2X	(CTX)(R_x030), VS38	// v6 = vs38
	VSLDOI	$8, V2, V2, V3
	VSLDOI	$8, V4, V4, V5
	VSLDOI	$8, V6, V6, V7

	MOVD	$0x0c0, R_x0c0
	MOVD	$0x0d0, R_x0d0
	MOVD	$0x0e0, R_x0e0
	MOVD	$0x0f0, R_x0f0
	MOVD	$0x100, R_x100
	MOVD	$0x110, R_x110

loop:
	MOVD	TBL_STRT, TBL
	LVX	(TBL)(R_x000), KI

	LXVD2X	(INP)(R_x000), V8 // load v8 in advance

	// Offload to VSR24-31 (aka FPR24-31)
	XXLOR	V0, V0, VS24
	XXLOR	V1, V1, VS25
	XXLOR	V2, V2, VS26
	XXLOR	V3, V3, VS27
	XXLOR	V4, V4, VS28
	XXLOR	V5, V5, VS29

	MOVD	$0x0c0, R_x0c0
	MOVD	$0x0d0, R_x0d0
	MOVD	$0x0e0, R_x0e0
	MOVD	$0x0f0, R_x0f0
	MOVD	$0x100, R_x100
	MOVD	$0x110, R_x110

loop:
	MOVD	TBL_STRT, TBL
	LVX	(TBL)(R_x000), KI

	LXVD2X	(INP)(R_x000), V8 // load v8 in advance

	// Offload to VSR24-31 (aka FPR24-31)
	XXLOR	V0, V0, VS24
	XXLOR	V1, V1, VS25
	XXLOR	V2, V2, VS26
	XXLOR	V3, V3, VS27
	XXLOR	V4, V4, VS28
	XXLOR	V5, V5, VS29

		if args[1] == "0" {
			return op + " (" + args[2] + ")," + args[0]
		}
		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]

	case LXVX, LXVD2X, LXVW4X, LXVH8X, LXVB16X, LVX, LVXL, LVSR, LVSL, LVEBX, LVEHX, LVEWX, LXSDX, LXSIWAX:
		return op + " (" + args[2] + ")(" + args[1] + ")," + args[0]

	case LXV:
		return op + " " + args[1] + "," + args[0]

// Unrolled index2to16 loop by 4 on ppc64le/power9
// Work is still needed for a big endian
// implementation on power9.

//go:build ppc64 || ppc64le

#include "go_asm.h"
#include "textflag.h"

// Needed to swap LXVD2X loads to the correct
// byte order to work on POWER8.

#ifdef GOARCH_ppc64
DATA byteswap<>+0(SB)/8, $0x0001020304050607
DATA byteswap<>+8(SB)/8, $0x08090a0b0c0d0e0f
#else
DATA byteswap<>+0(SB)/8, $0x0706050403020100

	VSPLTB  $7, V6, V4
	MTVSRD  R5, VS39        // ŝ
	VSPLTB  $7, V7, V2
	ADD     $-2, R4, R16
	PCALIGN $16
loopback:
	ADD     $-1, R8, R10
	SLD     $3, R10
	LXVD2X  (R6)(R10), VS32 // load x[i-1], x[i]
	SLD     $3, R8, R12
	LXVD2X  (R6)(R12), VS33 // load x[i], x[i+1]

	VSRD    V0, V4, V3      // x[i-1]>>s, x[i]>>s
	VSLD    V1, V2, V5      // x[i]<<ŝ, x[i+1]<<ŝ

			unsafePoint:    true,
		},

		// R31 is temp register
		// Loop code:
		//	MOVD len/32,R31		set up loop ctr
		//	MOVD R31,CTR
		//	MOVD $16,R31		index register
		// loop:
		//	LXVD2X (R0)(R4),VS32
		//	LXVD2X (R31)(R4),VS33
		//	ADD  R4,$32          increment src
		//	STXVD2X VS32,(R0)(R3)
		//	STXVD2X VS33,(R31)(R3)
		//	ADD  R3,$32          increment dst
		//	BC 16,0,loop         branch ctr