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Results 1 - 10 of 197 for shifts (0.4 sec)
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src/internal/types/testdata/check/shifts.go
} func shifts8() { // shift examples from shift discussion: better error messages var s uint _ = 1.0 /* ERROR "shifted operand 1.0 (type float64) must be integer" */ <<s == 1 _ = 1.0 /* ERROR "shifted operand 1.0 (type float64) must be integer" */ <<s == 1.0 _ = 1 /* ERROR "shifted operand 1 (type float64) must be integer" */ <<s == 1.0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 17 19:54:27 UTC 2023 - 12.7K bytes - Viewed (0) -
src/runtime/asm_386.s
DATA shifts<>+0x28(SB)/4, $0xffffffff DATA shifts<>+0x2c(SB)/4, $0xffffffff DATA shifts<>+0x30(SB)/4, $0xff0f0e0d DATA shifts<>+0x34(SB)/4, $0xffffffff DATA shifts<>+0x38(SB)/4, $0xffffffff DATA shifts<>+0x3c(SB)/4, $0xffffffff DATA shifts<>+0x40(SB)/4, $0x0f0e0d0c DATA shifts<>+0x44(SB)/4, $0xffffffff DATA shifts<>+0x48(SB)/4, $0xffffffff DATA shifts<>+0x4c(SB)/4, $0xffffffff
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Mar 15 15:45:13 UTC 2024 - 43.1K bytes - Viewed (0) -
test/codegen/shift.go
if shift >= 0 && shift < 64 { // arm64:"LSL",-"CSEL" r1 = val64 << shift } if shift >= 0 && shift < 32 { // arm64:"LSL",-"CSEL" r2 = val32 << shift } if shift >= 0 && shift < 16 { // arm64:"LSL",-"CSEL" r3 = val16 << shift } if shift >= 0 && shift < 8 { // arm64:"LSL",-"CSEL" r4 = val8 << shift } return r1, r2, r3, r4
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 21 18:53:43 UTC 2024 - 12.7K bytes - Viewed (0) -
test/prove.go
} func sh32x64(n int32) int32 { if n < 0 { return n } return n >> uint64(31) // ERROR "Proved Rsh32x64 shifts to zero" } func sh16(n int16) int16 { if n < 0 { return n } return n >> 15 // ERROR "Proved Rsh16x64 shifts to zero" } func sh64noopt(n int64) int64 { return n >> 63 // not optimized; n could be negative }
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Jan 23 00:02:36 UTC 2024 - 21.2K bytes - Viewed (0) -
cmd/metacache-stream_test.go
"src/compress/flate/testdata/huffman-rand-max.in", "src/compress/flate/testdata/huffman-shifts.dyn.expect", "src/compress/flate/testdata/huffman-shifts.dyn.expect-noinput", "src/compress/flate/testdata/huffman-shifts.golden", "src/compress/flate/testdata/huffman-shifts.in", "src/compress/flate/testdata/huffman-shifts.wb.expect", "src/compress/flate/testdata/huffman-shifts.wb.expect-noinput", "src/compress/flate/testdata/huffman-text-shift.dyn.expect", "src/compress/flate/testdata/huffman-text-shift.dyn.expect-noinput",...
Registered: Sun Jun 16 00:44:34 UTC 2024 - Last Modified: Mon Sep 19 18:05:16 UTC 2022 - 15K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/dec64.rules
(Rsh64x64 [c] x (Int64Make (Const32 [0]) lo)) => (Rsh64x32 [c] x lo) (Rsh64Ux64 [c] x (Int64Make (Const32 [0]) lo)) => (Rsh64Ux32 [c] x lo) // turn x64 non-constant shifts to x32 shifts // if high 32-bit of the shift is nonzero, make a huge shift (Lsh64x64 x (Int64Make hi lo)) && hi.Op != OpConst32 => (Lsh64x32 x (Or32 <typ.UInt32> (Zeromask hi) lo)) (Rsh64x64 x (Int64Make hi lo)) && hi.Op != OpConst32 =>
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Oct 04 19:35:46 UTC 2022 - 14.2K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/doc.go
specified alignment. 6. Shift instructions The simple scalar shifts on PPC64 expect a shift count that fits in 5 bits for 32-bit values or 6 bit for 64-bit values. If the shift count is a constant value greater than the max then the assembler sets it to the max for that size (31 for 32 bit values, 63 for 64 bit values). If the shift count is in a register, then
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Apr 21 16:47:45 UTC 2023 - 11.3K bytes - Viewed (0) -
src/cmd/asm/internal/asm/operand_test.go
{"$1000000000", "$1000000000"}, {"$__tsan_func_enter(SB)", "$__tsan_func_enter(SB)"}, {"$main(SB)", "$main(SB)"}, {"$masks<>(SB)", "$masks<>(SB)"}, {"$setg_gcc<>(SB)", "$setg_gcc<>(SB)"}, {"$shifts<>(SB)", "$shifts<>(SB)"}, {"$~(1<<63)", "$9223372036854775807"}, {"$~0x3F", "$-64"}, {"$~15", "$-16"}, {"(((8)&0xf)*4)(SP)", "32(SP)"}, {"(((8-14)&0xf)*4)(SP)", "40(SP)"}, {"(6+8)(AX)", "14(AX)"},
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Aug 29 18:31:05 UTC 2023 - 23.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/Wasm.rules
(Rsh8Ux64 [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) y) (Rsh8Ux(32|16|8) [c] x y) => (Rsh64Ux64 [c] (ZeroExt8to64 x) (ZeroExt(32|16|8)to64 y)) // Signed right shift needs to return 0/-1 if shift amount is >= width of shifted value. // We implement this by setting the shift value to (width - 1) if the shift value is >= width. (Rsh64x64 x y) && shiftIsBounded(v) => (I64ShrS x y) (Rsh64x64 x (I64Const [c])) && uint64(c) < 64 => (I64ShrS x (I64Const [c]))
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri Feb 17 03:56:57 UTC 2023 - 16.9K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/MIPS.rules
(Avg32u <t> x y) => (ADD (SRLconst <t> (SUB <t> x y) [1]) y) (And(32|16|8) ...) => (AND ...) (Or(32|16|8) ...) => (OR ...) (Xor(32|16|8) ...) => (XOR ...) // constant shifts // generic opt rewrites all constant shifts to shift by Const64 (Lsh32x64 x (Const64 [c])) && uint32(c) < 32 => (SLLconst x [int32(c)]) (Rsh32x64 x (Const64 [c])) && uint32(c) < 32 => (SRAconst x [int32(c)])
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 24 14:43:03 UTC 2023 - 35.3K bytes - Viewed (0)