LXVD2X	(R4)(R10), VS34
	LXVD2X	(R4)(R14), VS36
	LXVD2X	(R4)(R15), VS38
	LXVD2X	(R5)(R8), VS33
	LXVD2X	(R5)(R10), VS35
	LXVD2X	(R5)(R14), VS37
	LXVD2X	(R5)(R15), VS39
	XXLXOR	VS32, VS33, VS32
	XXLXOR	VS34, VS35, VS34
	XXLXOR	VS36, VS37, VS36
	XXLXOR	VS38, VS39, VS38
	STXVD2X	VS32, (R3)(R8)
	STXVD2X	VS34, (R3)(R10)
	STXVD2X	VS36, (R3)(R14)
	STXVD2X	VS38, (R3)(R15)
	ADD	$64, R8
	ADD	$64, R10
	ADD	$64, R14
	ADD	$64, R15

	MOVW  R0, 0(R3)     // zero 4 bytes
	ADD   $4, R3        // bump ptr by 4
	ADD   $-4, R4
	BR    zero512xsetup // ptr should now be 8 byte aligned

under512:
	SRDCC $3, R6, R7  // 64 byte chunks?
	XXLXOR VS32, VS32, VS32 // clear VS32 (V0)
	BEQ   lt64gt8

	// Prepare to clear 64 bytes at a time.

zero64setup:
	DCBTST (R3)             // prepare data cache
	MOVD   R7, CTR          // number of 64 byte chunks

#endif

	CMPU	R4, $32		// Check if it's a small string (<32 bytes)
	BLT	tail		// Jump to the small string case
	SRD	$5, R4, R20
	MOVD	R20, CTR
	MOVD	$16, R21
	XXLXOR	V4, V4, V4
	XXLXOR	V5, V5, V5

	PCALIGN	$16
cmploop:
	LXVD2X	(R0)(R3), V0	// Count 32B per loop with two vector accumulators.
	LXVD2X	(R21)(R3), V2
	VCMPEQUB V2, V1, V2
	VCMPEQUB V0, V1, V0

	"MTVSRD",
	"MTFPRD",
	"MTVRD",
	"MTVSRWA",
	"MTVSRWZ",
	"MTVSRDD",
	"MTVSRWS",
	"XXLAND",
	"XXLANDC",
	"XXLEQV",
	"XXLNAND",
	"XXLOR",
	"XXLORC",
	"XXLNOR",
	"XXLORQ",
	"XXLXOR",
	"XXSEL",
	"XXMRGHW",
	"XXMRGLW",
	"XXSPLTW",
	"XXSPLTIB",
	"XXPERM",
	"XXPERMDI",
	"XXSLDWI",
	"XXBRQ",
	"XXBRD",
	"XXBRW",
	"XXBRH",
	"XSCVDPSP",
	"XSCVSPDP",