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Results 1 - 10 of 10 for XXLXOR (0.21 sec)
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src/crypto/subtle/xor_ppc64x.s
LXVD2X (R4)(R10), VS34 LXVD2X (R4)(R14), VS36 LXVD2X (R4)(R15), VS38 LXVD2X (R5)(R8), VS33 LXVD2X (R5)(R10), VS35 LXVD2X (R5)(R14), VS37 LXVD2X (R5)(R15), VS39 XXLXOR VS32, VS33, VS32 XXLXOR VS34, VS35, VS34 XXLXOR VS36, VS37, VS36 XXLXOR VS38, VS39, VS38 STXVD2X VS32, (R3)(R8) STXVD2X VS34, (R3)(R10) STXVD2X VS36, (R3)(R14) STXVD2X VS38, (R3)(R15) ADD $64, R8 ADD $64, R10 ADD $64, R14 ADD $64, R15
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 18:17:17 UTC 2024 - 2.9K bytes - Viewed (0) -
src/crypto/aes/gcm_ppc64x.s
// Clear the keys XXLXOR VS0, VS0, VS0 XXLXOR VS1, VS1, VS1 XXLXOR VS2, VS2, VS2 XXLXOR VS3, VS3, VS3 XXLXOR VS4, VS4, VS4 XXLXOR VS5, VS5, VS5 XXLXOR VS6, VS6, VS6 XXLXOR VS7, VS7, VS7 XXLXOR VS8, VS8, VS8 XXLXOR VS9, VS9, VS9 XXLXOR VS10, VS10, VS10 XXLXOR VS11, VS11, VS11 XXLXOR VS12, VS12, VS12 XXLXOR VS13, VS13, VS13 XXLXOR VS14, VS14, VS14
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Mar 04 17:29:44 UTC 2024 - 27.1K bytes - Viewed (0) -
src/runtime/memclr_ppc64x.s
MOVW R0, 0(R3) // zero 4 bytes ADD $4, R3 // bump ptr by 4 ADD $-4, R4 BR zero512xsetup // ptr should now be 8 byte aligned under512: SRDCC $3, R6, R7 // 64 byte chunks? XXLXOR VS32, VS32, VS32 // clear VS32 (V0) BEQ lt64gt8 // Prepare to clear 64 bytes at a time. zero64setup: DCBTST (R3) // prepare data cache MOVD R7, CTR // number of 64 byte chunks
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue May 16 17:08:59 UTC 2023 - 4.4K bytes - Viewed (0) -
src/internal/bytealg/count_ppc64x.s
#endif CMPU R4, $32 // Check if it's a small string (<32 bytes) BLT tail // Jump to the small string case SRD $5, R4, R20 MOVD R20, CTR MOVD $16, R21 XXLXOR V4, V4, V4 XXLXOR V5, V5, V5 PCALIGN $16 cmploop: LXVD2X (R0)(R3), V0 // Count 32B per loop with two vector accumulators. LXVD2X (R21)(R3), V2 VCMPEQUB V2, V1, V2 VCMPEQUB V0, V1, V0
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Aug 14 20:30:44 UTC 2023 - 3.6K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/anames.go
"MTVSRD", "MTFPRD", "MTVRD", "MTVSRWA", "MTVSRWZ", "MTVSRDD", "MTVSRWS", "XXLAND", "XXLANDC", "XXLEQV", "XXLNAND", "XXLOR", "XXLORC", "XXLNOR", "XXLORQ", "XXLXOR", "XXSEL", "XXMRGHW", "XXMRGLW", "XXSPLTW", "XXSPLTIB", "XXPERM", "XXPERMDI", "XXSLDWI", "XXBRQ", "XXBRD", "XXBRW", "XXBRH", "XSCVDPSP", "XSCVSPDP",
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Mon Apr 01 18:50:29 UTC 2024 - 6.7K bytes - Viewed (0) -
src/cmd/compile/internal/ppc64/ssa.go
// power9. The Short variation is used // if no loop is generated. // sizes >= 64 generate a loop as follows: // Set up loop counter in CTR, used by BC // XXLXOR clears VS32 // XXLXOR VS32,VS32,VS32 // MOVD len/64,REG_TMP // MOVD REG_TMP,CTR // loop: // STXV VS32,0(R20) // STXV VS32,16(R20) // STXV VS32,32(R20)
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 55.4K bytes - Viewed (0) -
src/cmd/compile/internal/ssa/_gen/PPC64Ops.go
// arg0 = address of memory to zero (in R3, changed as side effect) // returns mem // // a loop is generated when there is more than one iteration // needed to clear 4 doublewords // // XXLXOR VS32,VS32,VS32 // MOVD $len/32,R31 // MOVD R31,CTR // MOVD $16,R31 // loop: // STXVD2X VS32,(R0)(R3) // STXVD2X VS32,(R31)(R3) // ADD R3,32 // BC loop
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 22 19:59:38 UTC 2024 - 43.8K bytes - Viewed (0) -
src/cmd/asm/internal/asm/testdata/ppc64.s
XXLNOR VS0, VS1, VS32 // f0000d11 XXLOR VS1, VS2, VS3 // f0611490 XXLORC VS1, VS2, VS3 // f0611550 XXLORQ VS1, VS2, VS3 // f0611490 XXLXOR VS1, VS2, VS3 // f06114d0 XXSEL VS1, VS2, VS3, VS4 // f08110f0 XXSEL VS33, VS34, VS35, VS36 // f08110ff XXSEL V1, V2, V3, V4 // f08110ff XXMRGHW VS1, VS2, VS3 // f0611090
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Fri May 17 21:53:50 UTC 2024 - 50.2K bytes - Viewed (0) -
src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/tables.go
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Tue Nov 22 17:16:14 UTC 2022 - 334.7K bytes - Viewed (0) -
src/cmd/internal/obj/ppc64/asm9.go
o2 = loadl16(REGTMP, d) o3 = LOP_RRR(c.oprrr(p.As), uint32(p.To.Reg), REGTMP, uint32(r)) } if p.From.Sym != nil { c.ctxt.Diag("%v is not supported", p) } case 24: /* lfd fA,float64(0) -> xxlxor xsA,xsaA,xsaA + fneg for -0 */ o1 = AOP_XX3I(c.oprrr(AXXLXOR), uint32(p.To.Reg), uint32(p.To.Reg), uint32(p.To.Reg), uint32(0)) // This is needed for -0. if o.size == 8 {
Registered: Wed Jun 12 16:32:35 UTC 2024 - Last Modified: Wed May 15 13:55:28 UTC 2024 - 156.1K bytes - Viewed (0)